diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_pch_common.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch_common.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch_common.c b/src/southbridge/intel/bd82x6x/early_pch_common.c index d2789005f0..0ea3dff001 100644 --- a/src/southbridge/intel/bd82x6x/early_pch_common.c +++ b/src/southbridge/intel/bd82x6x/early_pch_common.c @@ -17,10 +17,13 @@ #include <arch/io.h> #include <timestamp.h> #include <cpu/x86/tsc.h> +#include <device/pci_def.h> #include "pch.h" #include <arch/acpi.h> #include <console/console.h> +#include <rules.h> +#if ENV_ROMSTAGE uint64_t get_initial_timestamp(void) { tsc_t base_time = { @@ -56,3 +59,14 @@ int southbridge_detect_s3_resume(void) return 0; } +#endif + +int rtc_failure(void) +{ +#if defined(__SIMPLE_DEVICE__) + device_t dev = PCI_DEV(0, 0x1f, 0); +#else + device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); +#endif + return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD); +} |