aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x/early_me.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_me.c')
-rw-r--r--src/southbridge/intel/bd82x6x/early_me.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c
index 62ea0c559b..8fc72b8670 100644
--- a/src/southbridge/intel/bd82x6x/early_me.c
+++ b/src/southbridge/intel/bd82x6x/early_me.c
@@ -156,7 +156,7 @@ int intel_early_me_init_done(u8 status)
printk(BIOS_NOTICE, "ME: Current PM event: 0x%x\n", (me_fws2 & 0xf000000) >> 24);
printk(BIOS_NOTICE, "ME: Progress code : 0x%x\n", (me_fws2 & 0xf0000000) >> 28);
- // Poll cpu replaced for 50ms
+ // Poll CPU replaced for 50ms
millisec = 0;
while ((((me_fws2 & 0x100) >> 8) == 0) && millisec < 50) {
udelay(1000);