diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x/acpi')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/globalnvs.asl | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/pch.asl | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index e873f55375..25dcfe0ffe 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -100,6 +100,9 @@ Field (GNVS, ByteAcc, NoLock, Preserve) Offset (0xb2), XHCI, 8, + PM1I, 32, // System Wake Source - PM1 Index + GPEI, 32, // GPE Wake Source + Offset (0xf5), TPIQ, 8, // 0xf5 - trackpad IRQ value CBMC, 32, diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl index 4a033abfb1..5a80ab0b3e 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pch.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl @@ -181,7 +181,7 @@ Scope(\) // ICH7 Root Complex Register Block. Memory Mapped through RCBA) - OperationRegion(RCRB, SystemMemory, DEFAULT_RCBA, 0x4000) + OperationRegion(RCRB, SystemMemory, CONFIG_FIXED_RCBA_MMIO_BASE, CONFIG_RCBA_LENGTH) Field(RCRB, DWordAcc, Lock, Preserve) { Offset(0x0000), // Backbone |