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-rw-r--r--src/southbridge/amd/sb700/Kconfig4
-rw-r--r--src/southbridge/amd/sb700/early_setup.c8
2 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig
index 076193447b..bca74fb083 100644
--- a/src/southbridge/amd/sb700/Kconfig
+++ b/src/southbridge/amd/sb700/Kconfig
@@ -42,6 +42,10 @@ config SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT
bool
default n
+config SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA
+ bool
+ default n
+
config EHCI_BAR
hex
default 0xfef00000
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index d25599ea2e..2828bbed51 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -439,6 +439,14 @@ static void sb700_devices_por_init(void)
/*pci_write_config8(dev, 0x79, 0x4F); */
pci_write_config8(dev, 0x78, 0xFF);
+ if (IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA)) {
+ printk(BIOS_DEBUG, "%s: Disabling ISA DMA support\n", __func__);
+ /* Disable LPC ISA DMA Capability */
+ byte = pci_read_config8(dev, 0x78);
+ byte &= ~(1 << 0);
+ pci_write_config8(dev, 0x78, byte);
+ }
+
/* Set smbus iospace enable, I don't know why write 0x04 into reg5 that is reserved */
pci_write_config16(dev, 0x4, 0x0407);