diff options
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/amd8111/amd8111.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/amd8131/amd8131_bridge.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c index ccf26b623e..e576ea8f0c 100644 --- a/src/southbridge/amd/amd8111/amd8111.c +++ b/src/southbridge/amd/amd8111/amd8111.c @@ -40,7 +40,7 @@ void amd8111_enable(device_t dev) } reg = reg_old = pci_read_config16(lpc_dev, 0x48); reg &= ~(1 << index); - if (dev->enable) { + if (dev->enabled) { reg |= (1 << index); } if (reg != reg_old) { diff --git a/src/southbridge/amd/amd8131/amd8131_bridge.c b/src/southbridge/amd/amd8131/amd8131_bridge.c index 44b04d8636..dc474fc7b0 100644 --- a/src/southbridge/amd/amd8131/amd8131_bridge.c +++ b/src/southbridge/amd/amd8131/amd8131_bridge.c @@ -98,19 +98,19 @@ static struct pci_driver pcix_driver __pci_driver = { static void ioapic_enable(device_t dev) { uint32_t value; + value = pci_read_config32(dev, 0x44); - if (dev->enable) { + if (dev->enabled) { value |= ((1 << 1) | (1 << 0)); } else { value &= ~((1 << 1) | (1 << 0)); } pci_write_config32(dev, 0x44, value); -//BY LYH + /* We have to enable MEM and Bus Master for IOAPIC */ value = pci_read_config32(dev, 0x4); value |= 6; pci_write_config32(dev, 0x4, value); -//BY LYH END } static struct device_operations ioapic_ops = { |