5 files changed, 0 insertions, 14 deletions
diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
index dda29c1724..6fa17817f9 100644
--- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
@@ -57,5 +57,4 @@ void enable_usbdebug(unsigned int port)
 			   EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
 	pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2),
 				PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-	set_debug_port(port);
 }
diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig
index 4ae4641b86..fe9468d4af 100644
--- a/src/southbridge/amd/sb600/Kconfig
+++ b/src/southbridge/amd/sb600/Kconfig
@@ -36,10 +36,6 @@ config EHCI_DEBUG_OFFSET
 	hex
 	default 0xe0
 
-config USBDEBUG_DEFAULT_PORT
-	int
-	default 0
-
 choice
 	prompt "SATA Mode"
 	default SATA_MODE_IDE
diff --git a/src/southbridge/amd/sb600/enable_usbdebug.c b/src/southbridge/amd/sb600/enable_usbdebug.c
index d20c8c4fe1..40c53aecfa 100644
--- a/src/southbridge/amd/sb600/enable_usbdebug.c
+++ b/src/southbridge/amd/sb600/enable_usbdebug.c
@@ -36,9 +36,6 @@ void enable_usbdebug(unsigned int port)
 {
 	pci_devfn_t dev = PCI_DEV(0, 0x13, 5); /* USB EHCI, D19:F5 */
 
-	/* Select the requested physical USB port (1-15) as the Debug Port. */
-	set_debug_port(port);
-
 	/* Set the EHCI BAR address. */
 	pci_write_config32(dev, EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
 
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index 3aaf7c82bf..0712d2af2d 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -58,9 +58,4 @@ void enable_usbdebug(unsigned int port)
 	/* Enable access to the EHCI memory space registers. */
 	pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
 
-	/*
-	* Select the requested physical USB port (1-15) as the Debug Port.
-	* Must be called after the EHCI BAR has been set up (see above).
-	*/
-	set_debug_port(port);
 }
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index 09f742915d..6422fa2295 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -57,5 +57,4 @@ void enable_usbdebug(unsigned int port)
 			   EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
 	pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2),
 				PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-	set_debug_port(port);
 }