diff options
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/rs690/cmn.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/rs780/cmn.c | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/amd/rs690/cmn.c b/src/southbridge/amd/rs690/cmn.c index 68c46e9728..004cf78898 100644 --- a/src/southbridge/amd/rs690/cmn.c +++ b/src/southbridge/amd/rs690/cmn.c @@ -316,7 +316,13 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port) void rs690_set_tom(device_t nb_dev) { /* set TOM */ +#if CONFIG_GFXUMA pci_write_config32(nb_dev, 0x90, uma_memory_base); nbmc_write_index(nb_dev, 0x1e, uma_memory_base); +#else + /* 1GB system memory supposed */ + pci_write_config32(nb_dev, 0x90, 0x38000000); + nbmc_write_index(nb_dev, 0x1e, 0x38000000); +#endif } diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c index 5c72a04227..30da675ea0 100644 --- a/src/southbridge/amd/rs780/cmn.c +++ b/src/southbridge/amd/rs780/cmn.c @@ -357,8 +357,14 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port) void rs780_set_tom(device_t nb_dev) { /* set TOM */ +#if CONFIG_GFXUMA pci_write_config32(nb_dev, 0x90, uma_memory_base); //nbmc_write_index(nb_dev, 0x1e, uma_memory_base); +#else + /* 1GB system memory supposed */ + pci_write_config32(nb_dev, 0x90, 0x38000000); + //nbmc_write_index(nb_dev, 0x1e, 0x38000000); +#endif } // extract single bit |