diff options
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/acpi/pci_int.asl | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/acpi/pcie.asl | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/acpi/pci_int.asl | 4 |
3 files changed, 3 insertions, 9 deletions
diff --git a/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl b/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl index 37b2333b29..6ff81cd66f 100644 --- a/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl +++ b/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl @@ -1,8 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - /* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */ - OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */ - Field(PCFG, ByteAcc, NoLock, Preserve) { + Field(PCFG, ByteAcc, NoLock, Preserve) { /* Byte offsets are computed using the following technique: * ((bus number + 1) * ((device number * 8) * 4096)) + register offset * The 8 comes from 8 functions per device, and 4096 bytes per function config space diff --git a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl index 65ac920efa..f69ba1db24 100644 --- a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl +++ b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl @@ -29,9 +29,7 @@ Scope(\) { } Scope(\_SB) { - /* PCIe Configuration Space for 16 busses */ - OperationRegion(PCFG, SystemMemory, PCBA, 0x01000000) /* Each bus consumes 1MB */ - Field(PCFG, ByteAcc, NoLock, Preserve) { + Field(PCFG, ByteAcc, NoLock, Preserve) { /* Byte offsets are computed using the following technique: * ((bus number + 1) * ((device number * 8) * 4096)) + register offset * The 8 comes from 8 functions per device, and 4096 bytes per function config space diff --git a/src/southbridge/amd/pi/hudson/acpi/pci_int.asl b/src/southbridge/amd/pi/hudson/acpi/pci_int.asl index 37b2333b29..6ff81cd66f 100644 --- a/src/southbridge/amd/pi/hudson/acpi/pci_int.asl +++ b/src/southbridge/amd/pi/hudson/acpi/pci_int.asl @@ -1,8 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - /* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */ - OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */ - Field(PCFG, ByteAcc, NoLock, Preserve) { + Field(PCFG, ByteAcc, NoLock, Preserve) { /* Byte offsets are computed using the following technique: * ((bus number + 1) * ((device number * 8) * 4096)) + register offset * The 8 comes from 8 functions per device, and 4096 bytes per function config space |