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-rw-r--r--src/southbridge/amd/agesa/hudson/enable_usbdebug.c9
-rw-r--r--src/southbridge/amd/sb700/enable_usbdebug.c9
-rw-r--r--src/southbridge/amd/sb800/enable_usbdebug.c9
3 files changed, 15 insertions, 12 deletions
diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
index 147056ddc4..dda29c1724 100644
--- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
@@ -30,19 +30,20 @@
#define HUDSON_DEVN_BASE 0
#endif
-#define EHCI_EOR (CONFIG_EHCI_BAR + 0x20)
-#define DEBUGPORT_MISC_CONTROL (EHCI_EOR + 0x80)
+#define EHCI_EOR 0x20
+#define DEBUGPORT_MISC_CONTROL 0x80
void set_debug_port(unsigned int port)
{
+ u32 base_regs = CONFIG_EHCI_BAR + EHCI_EOR;
u32 reg32;
/* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
- reg32 = read32(DEBUGPORT_MISC_CONTROL);
+ reg32 = read32(base_regs + DEBUGPORT_MISC_CONTROL);
reg32 &= ~(0xf << 28);
reg32 |= (port << 28);
reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
- write32(DEBUGPORT_MISC_CONTROL, reg32);
+ write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
}
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index 00eb4d924b..3aaf7c82bf 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -27,19 +27,20 @@
#include <device/pci_def.h>
#include "sb700.h"
-#define EHCI_EOR (CONFIG_EHCI_BAR + 0x20)
-#define DEBUGPORT_MISC_CONTROL (EHCI_EOR + 0x80)
+#define EHCI_EOR 0x20
+#define DEBUGPORT_MISC_CONTROL 0x80
void set_debug_port(unsigned int port)
{
+ u32 base_regs = CONFIG_EHCI_BAR + EHCI_EOR;
u32 reg32;
/* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
- reg32 = read32(DEBUGPORT_MISC_CONTROL);
+ reg32 = read32(base_regs + DEBUGPORT_MISC_CONTROL);
reg32 &= ~(0xf << 28);
reg32 |= (port << 28);
reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
- write32(DEBUGPORT_MISC_CONTROL, reg32);
+ write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
}
/*
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index 8b80b3770f..09f742915d 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -30,19 +30,20 @@
#define SB800_DEVN_BASE 0
#endif
-#define EHCI_EOR (CONFIG_EHCI_BAR + 0x20)
-#define DEBUGPORT_MISC_CONTROL (EHCI_EOR + 0x80)
+#define EHCI_EOR 0x20
+#define DEBUGPORT_MISC_CONTROL 0x80
void set_debug_port(unsigned int port)
{
+ u32 base_regs = CONFIG_EHCI_BAR + EHCI_EOR;
u32 reg32;
/* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
- reg32 = read32(DEBUGPORT_MISC_CONTROL);
+ reg32 = read32(base_regs + DEBUGPORT_MISC_CONTROL);
reg32 &= ~(0xf << 28);
reg32 |= (port << 28);
reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
- write32(DEBUGPORT_MISC_CONTROL, reg32);
+ write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
}