diff options
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/ramtop.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/ramtop.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/ramtop.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb900/ramtop.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/early_setup.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/lpc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/sb800/early_setup.c | 6 |
7 files changed, 17 insertions, 21 deletions
diff --git a/src/southbridge/amd/agesa/hudson/ramtop.c b/src/southbridge/amd/agesa/hudson/ramtop.c index 798a3bbf42..22b291d1bb 100644 --- a/src/southbridge/amd/agesa/hudson/ramtop.c +++ b/src/southbridge/amd/agesa/hudson/ramtop.c @@ -26,7 +26,7 @@ int acpi_get_sleep_type(void) return (int)tmp; } -void backup_top_of_ram(uint64_t ramtop) +void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = ramtop; int nvram_pos = 0xf8, i; /* temp */ @@ -37,7 +37,7 @@ void backup_top_of_ram(uint64_t ramtop) } } -unsigned long get_top_of_ram(void) +uintptr_t restore_top_of_low_cacheable(void) { uint32_t xdata = 0; int xnvram_pos = 0xf8, xi; @@ -47,5 +47,5 @@ unsigned long get_top_of_ram(void) xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (unsigned long) xdata; + return xdata; } diff --git a/src/southbridge/amd/cimx/sb700/ramtop.c b/src/southbridge/amd/cimx/sb700/ramtop.c index f59a9a346b..cbc4596f57 100644 --- a/src/southbridge/amd/cimx/sb700/ramtop.c +++ b/src/southbridge/amd/cimx/sb700/ramtop.c @@ -18,7 +18,7 @@ #include <cbmem.h> #include <southbridge/amd/cimx/cimx_util.h> -void backup_top_of_ram(uint64_t ramtop) +void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = ramtop; int nvram_pos = 0xfc, i; @@ -29,7 +29,7 @@ void backup_top_of_ram(uint64_t ramtop) } } -unsigned long get_top_of_ram(void) +uintptr_t restore_top_of_low_cacheable(void) { u32 xdata = 0; int xnvram_pos = 0xfc, xi; @@ -39,5 +39,5 @@ unsigned long get_top_of_ram(void) xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (unsigned long) xdata; + return xdata; } diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c index 4d5b9a8a62..3c685767bc 100644 --- a/src/southbridge/amd/cimx/sb800/ramtop.c +++ b/src/southbridge/amd/cimx/sb800/ramtop.c @@ -26,7 +26,7 @@ int acpi_get_sleep_type(void) return (int)tmp; } -void backup_top_of_ram(uint64_t ramtop) +void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = ramtop; int nvram_pos = 0xf8, i; /* temp */ @@ -37,7 +37,7 @@ void backup_top_of_ram(uint64_t ramtop) } } -unsigned long get_top_of_ram(void) +uintptr_t restore_top_of_low_cacheable(void) { u32 xdata = 0; int xnvram_pos = 0xf8, xi; @@ -47,5 +47,5 @@ unsigned long get_top_of_ram(void) xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (unsigned long) xdata; + return xdata; } diff --git a/src/southbridge/amd/cimx/sb900/ramtop.c b/src/southbridge/amd/cimx/sb900/ramtop.c index 34e8364379..26e930bb7e 100644 --- a/src/southbridge/amd/cimx/sb900/ramtop.c +++ b/src/southbridge/amd/cimx/sb900/ramtop.c @@ -18,7 +18,7 @@ #include <cbmem.h> #include <southbridge/amd/cimx/cimx_util.h> -void backup_top_of_ram(uint64_t ramtop) +void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = ramtop; int nvram_pos = 0xf8, i; /* temp */ @@ -29,7 +29,7 @@ void backup_top_of_ram(uint64_t ramtop) } } -unsigned long get_top_of_ram(void) +uintptr_t restore_top_of_low_cacheable(void) { u32 xdata = 0; int xnvram_pos = 0xf8, xi; @@ -39,5 +39,5 @@ unsigned long get_top_of_ram(void) xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (unsigned long) xdata; + return xdata; } diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index f20c1e1dfd..3ed4cac8a1 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -860,8 +860,7 @@ void set_lpc_sticky_ctl(bool enable) pmio_write(0xbb, byte); } -#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) -unsigned long get_top_of_ram(void) +uintptr_t restore_top_of_low_cacheable(void) { uint32_t xdata = 0; int xnvram_pos = 0xfc, xi; @@ -873,8 +872,7 @@ unsigned long get_top_of_ram(void) xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (unsigned long) xdata; + return xdata; } -#endif #endif diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 8270f8a450..fda30b8687 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -89,7 +89,7 @@ int acpi_get_sleep_type(void) return ((tmp & (7 << 10)) >> 10); } -void backup_top_of_ram(uint64_t ramtop) +void backup_top_of_low_cacheable(uintptr_t ramtop) { u32 dword = (u32) ramtop; int nvram_pos = 0xfc, i; diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 7ac6ec85fe..c9ae08c755 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -665,8 +665,7 @@ int acpi_get_sleep_type(void) return ((tmp & (7 << 10)) >> 10); } -#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) -unsigned long get_top_of_ram(void) +uintptr_t restore_top_of_low_cacheable(void) { uint32_t xdata = 0; int xnvram_pos = 0xfc, xi; @@ -678,8 +677,7 @@ unsigned long get_top_of_ram(void) xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (unsigned long) xdata; + return xdata; } -#endif #endif |