aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/amd/sr5650/cmn.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/amd/sr5650/cmn.h')
-rw-r--r--src/southbridge/amd/sr5650/cmn.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h
index db27d4f455..0c0fd29ca7 100644
--- a/src/southbridge/amd/sr5650/cmn.h
+++ b/src/southbridge/amd/sr5650/cmn.h
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -22,6 +23,8 @@
#define NBHTIU_INDEX 0x94 /* Note: It is different with RS690, whose HTIU index is 0xA8 */
#define NBMC_INDEX 0xE8
#define NBPCIE_INDEX 0xE0
+#define L2CFG_INDEX 0xF0
+#define L1CFG_INDEX 0xF8
#define EXT_CONF_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define TEMP_MMIO_BASE_ADDRESS 0xC0000000