diff options
Diffstat (limited to 'src/southbridge/amd/rs780/gfx.c')
| -rw-r--r-- | src/southbridge/amd/rs780/gfx.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c index 02be1f327e..7f8bcb0a3c 100644 --- a/src/southbridge/amd/rs780/gfx.c +++ b/src/southbridge/amd/rs780/gfx.c @@ -382,7 +382,7 @@ static void internal_gfx_pci_dev_init(struct device *dev) /* GFX_InitFBAccess finished. */ -#if CONFIG_GFXUMA /* for UMA mode. */ +#if IS_ENABLED(CONFIG_GFXUMA) /* for UMA mode. */ /* GFX_StartMC. */ set_nbmc_enable_bits(nb_dev, 0x02, 0x00000000, 0x80000000); set_nbmc_enable_bits(nb_dev, 0x01, 0x00000000, 0x00000001); @@ -444,7 +444,7 @@ static void internal_gfx_pci_dev_init(struct device *dev) vgainfo.sHeader.ucTableFormatRevision = 1; vgainfo.sHeader.ucTableContentRevision = 2; -#if !CONFIG_GFXUMA /* SP mode. */ +#if !IS_ENABLED(CONFIG_GFXUMA) /* SP mode. */ // Side port support is incomplete, do not use it // These parameters must match the motherboard vgainfo.ulBootUpSidePortClock = 667*100; @@ -629,7 +629,7 @@ static void internal_gfx_pci_dev_init(struct device *dev) /* Transfer the Table to VBIOS. */ pointer = (u32 *)&vgainfo; for (i = 0; i < sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4) { -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) *GpuF0MMReg = 0x80000000 + uma_memory_size - 512 + i; #else *GpuF0MMReg = 0x80000000 + 0x8000000 - 512 + i; @@ -758,7 +758,7 @@ static void rs780_internal_gfx_enable(device_t dev) device_t nb_dev = dev_find_slot(0, 0); msr_t sysmem; -#if !CONFIG_GFXUMA +#if !IS_ENABLED(CONFIG_GFXUMA) u32 FB_Start, FB_End; #endif @@ -801,7 +801,7 @@ static void rs780_internal_gfx_enable(device_t dev) set_nbmc_enable_bits(nb_dev, 0x25, 0xffffffff, 0x111f111f); set_htiu_enable_bits(nb_dev, 0x37, 1<<24, 1<<24); -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) /* GFX_InitUMA. */ /* Copy CPU DDR Controller to NB MC. */ device_t k8_f1 = dev_find_slot(0, PCI_DEVFN(0x18, 1)); |