diff options
Diffstat (limited to 'src/southbridge/amd/cs5530')
| -rw-r--r-- | src/southbridge/amd/cs5530/Kconfig | 74 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/Makefile.inc | 25 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/bitmap.c | 304 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/chip.h | 29 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/cs5530.c | 59 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/cs5530.h | 46 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/enable_rom.c | 47 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/ide.c | 78 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/isa.c | 64 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/pirq.c | 39 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5530/vga.c | 495 |
11 files changed, 0 insertions, 1260 deletions
diff --git a/src/southbridge/amd/cs5530/Kconfig b/src/southbridge/amd/cs5530/Kconfig deleted file mode 100644 index 3e042763f0..0000000000 --- a/src/southbridge/amd/cs5530/Kconfig +++ /dev/null @@ -1,74 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -config SOUTHBRIDGE_AMD_CS5530 - bool - -menu "AMD Geode GX1 video support" - depends on SOUTHBRIDGE_AMD_CS5530 - -config GX1_VIDEO - bool "AMD Geode GX1 video mode support" - default y - depends on SOUTHBRIDGE_AMD_CS5530 - -choice - prompt "AMD Geode GX1 video mode" - default GX1_VIDEOMODE_0 - depends on GX1_VIDEO - -config GX1_VIDEOMODE_0 - bool "640x480" -config GX1_VIDEOMODE_1 - bool "800x600" -config GX1_VIDEOMODE_2 - bool "1024x768" -config GX1_VIDEOMODE_3 - bool "1280x960" -config GX1_VIDEOMODE_4 - bool "1280x1024" - -endchoice - -config GX1_VIDEOMODE - int - default 0 if GX1_VIDEOMODE_0 - default 1 if GX1_VIDEOMODE_1 - default 2 if GX1_VIDEOMODE_2 - default 3 if GX1_VIDEOMODE_3 - default 4 if GX1_VIDEOMODE_4 - depends on GX1_VIDEO - -# TODO: Check how much RAM each of the modes actually needs. -config VIDEO_MB - int - default 2 if GX1_VIDEOMODE_0 - default 2 if GX1_VIDEOMODE_1 - default 2 if GX1_VIDEOMODE_2 - default 2 if GX1_VIDEOMODE_3 - default 2 if GX1_VIDEOMODE_4 - depends on GX1_VIDEO - -config SPLASH_GRAPHIC - bool "Enable splash screen on AMD Geode GX1 boards" - default y - depends on GX1_VIDEO - -endmenu - diff --git a/src/southbridge/amd/cs5530/Makefile.inc b/src/southbridge/amd/cs5530/Makefile.inc deleted file mode 100644 index 74d6057843..0000000000 --- a/src/southbridge/amd/cs5530/Makefile.inc +++ /dev/null @@ -1,25 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -ramstage-y += cs5530.c -ramstage-y += isa.c -ramstage-y += ide.c -ramstage-y += vga.c -ramstage-y += pirq.c diff --git a/src/southbridge/amd/cs5530/bitmap.c b/src/southbridge/amd/cs5530/bitmap.c deleted file mode 100644 index 0e5e02c572..0000000000 --- a/src/southbridge/amd/cs5530/bitmap.c +++ /dev/null @@ -1,304 +0,0 @@ -/* do not edit -This is an image of size 51 x 60 with 234 colours */ -static const int width=51; -static const int height=60; -static const int colours=234; -static const unsigned long colour_map[234] = { -0x00000000, /* 0 */ -0x00000001, /* 1 */ -0x00000020, /* 2 */ -0x00000021, /* 3 */ -0x00000040, /* 4 */ -0x00000800, /* 5 */ -0x00000821, /* 6 */ -0x00000840, /* 7 */ -0x00000841, /* 8 */ -0x00000861, /* 9 */ -0x00001040, /* 10 */ -0x00001081, /* 11 */ -0x00001082, /* 12 */ -0x00001083, /* 13 */ -0x000010A2, /* 14 */ -0x00001881, /* 15 */ -0x000018C3, /* 16 */ -0x000018E3, /* 17 */ -0x000020A0, /* 18 */ -0x000020E4, /* 19 */ -0x00002103, /* 20 */ -0x00002104, /* 21 */ -0x00002124, /* 22 */ -0x00002921, /* 23 */ -0x00002945, /* 24 */ -0x00002946, /* 25 */ -0x00002965, /* 26 */ -0x00002966, /* 27 */ -0x00003186, /* 28 */ -0x000031A6, /* 29 */ -0x00003942, /* 30 */ -0x00003982, /* 31 */ -0x000039A7, /* 32 */ -0x000039C7, /* 33 */ -0x000039E7, /* 34 */ -0x000039E8, /* 35 */ -0x000041A2, /* 36 */ -0x000041C2, /* 37 */ -0x000041E7, /* 38 */ -0x00004207, /* 39 */ -0x00004208, /* 40 */ -0x00004228, /* 41 */ -0x00004229, /* 42 */ -0x000049E3, /* 43 */ -0x000049E5, /* 44 */ -0x00004A46, /* 45 */ -0x00004A47, /* 46 */ -0x00004A48, /* 47 */ -0x00004A49, /* 48 */ -0x00004A69, /* 49 */ -0x00004A8A, /* 50 */ -0x00005228, /* 51 */ -0x00005247, /* 52 */ -0x00005287, /* 53 */ -0x0000528A, /* 54 */ -0x000052AA, /* 55 */ -0x00005A21, /* 56 */ -0x00005A43, /* 57 */ -0x00005A63, /* 58 */ -0x00005AA9, /* 59 */ -0x00005AAA, /* 60 */ -0x00005ACA, /* 61 */ -0x00005ACB, /* 62 */ -0x00005AEB, /* 63 */ -0x00006222, /* 64 */ -0x00006261, /* 65 */ -0x000062A8, /* 66 */ -0x000062C7, /* 67 */ -0x000062E8, /* 68 */ -0x000062EB, /* 69 */ -0x000062EC, /* 70 */ -0x0000630B, /* 71 */ -0x0000630C, /* 72 */ -0x0000632C, /* 73 */ -0x00006A41, /* 74 */ -0x00006B05, /* 75 */ -0x00006B28, /* 76 */ -0x00006B29, /* 77 */ -0x00006B2D, /* 78 */ -0x00006B4D, /* 79 */ -0x00006B6D, /* 80 */ -0x00006B6E, /* 81 */ -0x00006B8D, /* 82 */ -0x000072A2, /* 83 */ -0x000072E2, /* 84 */ -0x000072E5, /* 85 */ -0x00007306, /* 86 */ -0x00007329, /* 87 */ -0x0000738E, /* 88 */ -0x000073AE, /* 89 */ -0x000073AF, /* 90 */ -0x000073CF, /* 91 */ -0x00007B28, /* 92 */ -0x00007B44, /* 93 */ -0x00007B48, /* 94 */ -0x00007B67, /* 95 */ -0x00007B69, /* 96 */ -0x00007BCE, /* 97 */ -0x00007BCF, /* 98 */ -0x00007BEF, /* 99 */ -0x00008323, /* 100 */ -0x00008345, /* 101 */ -0x000083AA, /* 102 */ -0x00008410, /* 103 */ -0x00008430, /* 104 */ -0x00008B02, /* 105 */ -0x00008B63, /* 106 */ -0x00008B83, /* 107 */ -0x00008B84, /* 108 */ -0x00008BA6, /* 109 */ -0x00008BC7, /* 110 */ -0x00008BEA, /* 111 */ -0x00008BEE, /* 112 */ -0x00008C51, /* 113 */ -0x00008C71, /* 114 */ -0x00009362, /* 115 */ -0x00009363, /* 116 */ -0x00009383, /* 117 */ -0x000093C5, /* 118 */ -0x000093C7, /* 119 */ -0x00009405, /* 120 */ -0x00009492, /* 121 */ -0x00009493, /* 122 */ -0x000094B2, /* 123 */ -0x00009B82, /* 124 */ -0x00009BC3, /* 125 */ -0x00009C2D, /* 126 */ -0x00009CB3, /* 127 */ -0x00009CD3, /* 128 */ -0x00009CF3, /* 129 */ -0x00009CF4, /* 130 */ -0x00009D14, /* 131 */ -0x0000A401, /* 132 */ -0x0000A403, /* 133 */ -0x0000A423, /* 134 */ -0x0000A44C, /* 135 */ -0x0000A489, /* 136 */ -0x0000A4F1, /* 137 */ -0x0000A514, /* 138 */ -0x0000A533, /* 139 */ -0x0000A534, /* 140 */ -0x0000ABE1, /* 141 */ -0x0000AC22, /* 142 */ -0x0000AC24, /* 143 */ -0x0000AC42, /* 144 */ -0x0000AC44, /* 145 */ -0x0000AC48, /* 146 */ -0x0000AC69, /* 147 */ -0x0000AC8A, /* 148 */ -0x0000ACEE, /* 149 */ -0x0000AD0A, /* 150 */ -0x0000AD2E, /* 151 */ -0x0000AD55, /* 152 */ -0x0000AD75, /* 153 */ -0x0000AD76, /* 154 */ -0x0000B423, /* 155 */ -0x0000B441, /* 156 */ -0x0000B444, /* 157 */ -0x0000B464, /* 158 */ -0x0000B484, /* 159 */ -0x0000B4A3, /* 160 */ -0x0000B4C4, /* 161 */ -0x0000B533, /* 162 */ -0x0000B596, /* 163 */ -0x0000B5B6, /* 164 */ -0x0000BC65, /* 165 */ -0x0000BC83, /* 166 */ -0x0000BC84, /* 167 */ -0x0000BCC9, /* 168 */ -0x0000BD03, /* 169 */ -0x0000BD2A, /* 170 */ -0x0000BD54, /* 171 */ -0x0000BD97, /* 172 */ -0x0000BDB5, /* 173 */ -0x0000BDD7, /* 174 */ -0x0000BDD8, /* 175 */ -0x0000BDF7, /* 176 */ -0x0000BE19, /* 177 */ -0x0000C4A2, /* 178 */ -0x0000C4C2, /* 179 */ -0x0000C4C3, /* 180 */ -0x0000C5CE, /* 181 */ -0x0000C5F9, /* 182 */ -0x0000C618, /* 183 */ -0x0000C61A, /* 184 */ -0x0000C638, /* 185 */ -0x0000CCE2, /* 186 */ -0x0000CD03, /* 187 */ -0x0000CD43, /* 188 */ -0x0000CD61, /* 189 */ -0x0000CD88, /* 190 */ -0x0000CE39, /* 191 */ -0x0000CE58, /* 192 */ -0x0000CE59, /* 193 */ -0x0000CE79, /* 194 */ -0x0000CE7A, /* 195 */ -0x0000CE7B, /* 196 */ -0x0000CE9A, /* 197 */ -0x0000D502, /* 198 */ -0x0000D522, /* 199 */ -0x0000D62C, /* 200 */ -0x0000D69A, /* 201 */ -0x0000D69B, /* 202 */ -0x0000D6BA, /* 203 */ -0x0000DD23, /* 204 */ -0x0000DD41, /* 205 */ -0x0000DD81, /* 206 */ -0x0000DDA1, /* 207 */ -0x0000DDA4, /* 208 */ -0x0000DE9C, /* 209 */ -0x0000DEDB, /* 210 */ -0x0000DEFB, /* 211 */ -0x0000DEFD, /* 212 */ -0x0000E5A2, /* 213 */ -0x0000E71C, /* 214 */ -0x0000E73C, /* 215 */ -0x0000EDC1, /* 216 */ -0x0000EF3E, /* 217 */ -0x0000EF5D, /* 218 */ -0x0000EF7D, /* 219 */ -0x0000EF7E, /* 220 */ -0x0000EF7F, /* 221 */ -0x0000F79D, /* 222 */ -0x0000F79E, /* 223 */ -0x0000F7BE, /* 224 */ -0x0000F7BF, /* 225 */ -0x0000F7DE, /* 226 */ -0x0000FFB8, /* 227 */ -0x0000FFBF, /* 228 */ -0x0000FFDD, /* 229 */ -0x0000FFDE, /* 230 */ -0x0000FFDF, /* 231 */ -0x0000FFFB, /* 232 */ -0x0000FFFF, /* 233 */ -}; - -static const unsigned char bitmap[3060] = { -0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE7,0xA4,0xD3,0xE9,0xDF,0xDF,0x8C,0xE7,0xE0,0xDF,0xB0,0xDB,0xE7,0xE0,0xE0,0xC2,0xE7,0xE7,0xE0,0xD3,0xE9,0xE9,0xE0,0xDF,0xDF,0xE7,0xE7,0xD6,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE9,0xE0,0xDB,0xDA,0xDF,0xE9,0x67,0xA3,0xD7,0xDA,0xE9,0x71,0xD7,0xA3,0xE9,0xD6,0xD7,0xD2,0xD6,0xE9,0xC1,0xDF,0x68,0xE9,0xDA,0xE0,0x99,0xAE,0xE9,0xD7,0xB9,0xE9,0xA3,0xDF,0xE0,0xE7,0xE7,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0xD6,0x71,0x67,0x63,0x72,0xE9,0x31,0x4F,0x58,0x99,0xD6,0x1D,0x67,0x50,0xB7,0x67,0x36,0x4F,0x99,0xD6,0x28,0x49,0x3F,0xDB,0x71,0x48,0x48,0x80,0xDB,0x37,0x48,0xE9,0x8C,0x58,0x68,0xDA,0xDB,0xDF,0xE0,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0x79,0x63,0x63,0x58,0x29,0x7B,0x1A,0x28,0x30,0x30,0x63,0x0C,0x50,0x10,0x50,0x28,0x21,0x1D,0x31,0x62,0x11,0x36,0x10,0x68,0x30,0x30,0x16,0x3E,0x68,0x15,0x29,0x8C,0x3E,0x11,0x36,0x4F,0xC2,0xD7,0xDA,0xDF,0xE7,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE7,0x62,0x62,0x63,0x63,0x22,0x37,0x16,0x28,0x36,0x1C,0x28,0x0C,0x49,0x15,0x29,0x16,0x21,0x1D,0x22,0x22,0x0C,0x31,0x11,0x29,0x15,0x21,0x15,0x22,0x22,0x10,0x22,0x48,0x1D,0x08,0x3E,0x29,0x3E,0xB9,0xD2,0xD7,0xDB,0xE0,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xDB,0x62,0x4F,0x4F,0x3F,0x30,0x21,0x15,0x28,0x31,0x22,0x1A,0x0C,0x50,0x18,0x1D,0x0E,0x29,0x1D,0x22,0x16,0x10,0x37,0x1D,0x1D,0x0C,0x28,0x1A,0x29,0x1A,0x18,0x21,0x21,0x16,0x0E,0x3E,0x29,0x30,0x48,0xB0,0xC9,0xD3,0xDB,0xE0,0xE7,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE7,0xA3,0x72,0x21,0x15,0x31,0x36,0x30,0x49,0x36,0x3F,0x29,0x30,0x4F,0x29,0x36,0x21,0x3F,0x28,0x30,0x1A,0x28,0x3E,0x22,0x18,0x16,0x3E,0x1D,0x21,0x11,0x22,0x21,0x10,0x11,0x37,0x11,0x15,0x28,0x48,0x80,0xA4,0xC1,0xD3,0xDA,0xE0,0xE7,0xE9,0xE9,0xE9, -0xE9,0xD3,0xE9,0xE9,0xE9,0xB7,0x59,0x22,0x58,0x48,0x48,0x48,0x37,0x37,0x3E,0x36,0x36,0x36,0x36,0x37,0x31,0x36,0x36,0x37,0x36,0x30,0x29,0x31,0x36,0x30,0x31,0x31,0x31,0x30,0x30,0x37,0x15,0x15,0xC1,0xE9,0xE9,0x8A,0x59,0x99,0xC1,0xD3,0xDB,0xE0,0xE9,0xE9,0xE9, -0xE9,0x68,0x50,0x1C,0x16,0x31,0x30,0x1A,0x58,0x49,0x3F,0x3E,0x3E,0x37,0x36,0x37,0x31,0x30,0x30,0x31,0x36,0x30,0x29,0x29,0x29,0x29,0x28,0x28,0x29,0x22,0x28,0x22,0x29,0x29,0x30,0x31,0x15,0x1C,0x59,0x50,0x36,0x36,0x49,0x7B,0xA3,0xC2,0xD6,0xDB,0xE7,0xE9,0xE9, -0xE9,0xA4,0x50,0x58,0x36,0x29,0x37,0x4F,0x50,0x3F,0x3E,0x31,0x31,0x31,0x36,0x36,0x36,0x31,0x30,0x30,0x29,0x30,0x30,0x29,0x28,0x22,0x28,0x28,0x22,0x28,0x22,0x21,0x22,0x22,0x22,0x36,0x28,0x29,0x1A,0x15,0x0C,0x1A,0x37,0x63,0x80,0xAE,0xC9,0xD7,0xDF,0xE7,0xE9, -0xE9,0xE7,0xC9,0x80,0x28,0x16,0x15,0x15,0x49,0x37,0x37,0x37,0x30,0x30,0x29,0x30,0x31,0x30,0x29,0x29,0x28,0x36,0x28,0x28,0x48,0x29,0x21,0x22,0x28,0x21,0x21,0x22,0x1D,0x22,0x22,0x30,0x21,0x16,0x1C,0x21,0x31,0x31,0x37,0x4F,0x68,0x8C,0xB7,0xD3,0xDB,0xE7,0xE9, -0xE9,0xC2,0xE9,0xDA,0xB0,0x4F,0x1D,0x1D,0x4F,0x37,0x31,0x36,0x36,0x30,0x30,0x30,0x31,0x29,0x30,0x28,0x36,0x81,0x50,0x15,0x0C,0x31,0x28,0x21,0x22,0x22,0x22,0x21,0x22,0x21,0x1D,0x28,0x0E,0x11,0x81,0xDF,0xE0,0x80,0x36,0x3E,0x59,0x7B,0xA4,0xC9,0xDA,0xE0,0xE9, -0xE7,0x72,0x67,0x3E,0x37,0x36,0x16,0x28,0x49,0x37,0x36,0x30,0x30,0x30,0x29,0x30,0x29,0x30,0x22,0x28,0x49,0xB7,0xB9,0x99,0x29,0x0E,0x31,0x28,0x1D,0x21,0x22,0x1D,0x1D,0x22,0x21,0x28,0x11,0x22,0x8C,0x98,0x8A,0x4F,0x30,0x36,0x4F,0x71,0x99,0xC2,0xD7,0xE0,0xE7, -0xDF,0x80,0x3E,0x18,0x10,0x21,0x31,0x3F,0x48,0x36,0x36,0x30,0x30,0x29,0x30,0x30,0x30,0x29,0x28,0x28,0x50,0xA4,0x8C,0x98,0xA4,0x3E,0x10,0x31,0x22,0x22,0x1D,0x1D,0x22,0x21,0x22,0x22,0x18,0x30,0x10,0x09,0x08,0x0C,0x1D,0x30,0x49,0x68,0x98,0xC1,0xD6,0xDF,0xE7, -0xE9,0xE7,0xB0,0x50,0x22,0x28,0x22,0x28,0x3E,0x36,0x31,0x30,0x30,0x30,0x29,0x29,0x29,0x28,0x29,0x28,0x4F,0x80,0x48,0x48,0x63,0x98,0x3F,0x16,0x29,0x21,0x1D,0x21,0x21,0x1D,0x21,0x22,0x1D,0x21,0x29,0x31,0x1D,0x1A,0x22,0x30,0x48,0x67,0x8C,0xB9,0xD6,0xDF,0xE7, -0xDF,0xD3,0xE9,0xD7,0x81,0x31,0x10,0x16,0x3E,0x36,0x31,0x30,0x29,0x30,0x29,0x29,0x28,0x28,0x28,0x28,0x37,0x67,0x48,0x48,0x47,0x50,0x7B,0x36,0x1A,0x30,0x1D,0x1D,0x1D,0x21,0x21,0x21,0x10,0x15,0x63,0xC1,0xC1,0x62,0x31,0x30,0x48,0x67,0x8C,0xB9,0xD6,0xDF,0xE7, -0xE0,0x8A,0xAE,0x67,0x4F,0x37,0x18,0x22,0x3F,0x36,0x30,0x30,0x29,0x22,0x29,0x29,0x22,0x28,0x28,0x21,0x29,0x61,0x47,0x47,0x48,0x48,0x4F,0x79,0x31,0x22,0x37,0x1D,0x1D,0x1D,0x1C,0x21,0x15,0x36,0xC1,0xD6,0xB7,0x59,0x28,0x30,0x48,0x63,0x8A,0xB9,0xD6,0xDF,0xE7, -0xD2,0x59,0x36,0x10,0x0C,0x1C,0x15,0x29,0x3F,0x30,0x36,0x30,0x30,0x28,0x22,0x1D,0x28,0x31,0x22,0x21,0x22,0x3E,0x48,0x48,0x48,0x48,0x48,0x50,0x68,0x30,0x30,0x28,0x1D,0x1C,0x21,0x1D,0x11,0x1C,0x0C,0x00,0x02,0x09,0x21,0x30,0x48,0x63,0x8A,0xB9,0xD6,0xDF,0xE7, -0xE9,0xDB,0x80,0x4F,0x30,0x3E,0x48,0x49,0x36,0x30,0x31,0x30,0x29,0x22,0x2E,0x2D,0x4C,0x6D,0x76,0x94,0x4D,0x31,0x4E,0x48,0x47,0x48,0x48,0x48,0x50,0x62,0x30,0x37,0x1D,0x1D,0x1D,0x1D,0x21,0x29,0x22,0x21,0x1C,0x16,0x21,0x30,0x48,0x63,0x8C,0xB9,0xD6,0xDF,0xE7, -0xE7,0xE0,0xB9,0x72,0x1D,0x16,0x10,0x16,0x36,0x29,0x29,0x30,0x29,0x44,0xB5,0xC8,0x5D,0x6E,0x9E,0x9D,0x78,0x5F,0x70,0x46,0x47,0x47,0x48,0x3F,0x3F,0x58,0x4F,0x36,0x36,0x1A,0x1A,0x1C,0x15,0x10,0x1D,0x49,0x63,0x37,0x36,0x30,0x48,0x67,0x8C,0xB9,0xD6,0xDF,0xE7, -0xDA,0xAE,0xE9,0xC2,0x8A,0x3F,0x1A,0x21,0x31,0x29,0x29,0x28,0x29,0x89,0xE5,0xE3,0xAA,0x66,0x38,0x4A,0x41,0x40,0x5C,0x45,0x3E,0x3E,0x3E,0x3E,0x3E,0x3F,0x58,0x48,0x48,0x31,0x18,0x21,0x10,0x21,0xD7,0xE9,0xE7,0x80,0x30,0x30,0x48,0x67,0x8C,0xB9,0xD6,0xDF,0xE7, -0xD2,0x62,0x62,0x29,0x28,0x28,0x11,0x22,0x36,0x28,0x28,0x28,0x29,0x7E,0xE4,0xE8,0x96,0x3A,0x86,0x8E,0x85,0x75,0x53,0x57,0x3C,0x37,0x37,0x37,0x37,0x37,0x3E,0x4F,0x49,0x4F,0x1C,0x1C,0x16,0x1D,0x31,0x31,0x22,0x1D,0x21,0x30,0x48,0x67,0x8C,0xB9,0xD6,0xDF,0xE7, -0xDA,0xB0,0x62,0x16,0x10,0x21,0x31,0x48,0x37,0x28,0x28,0x3B,0x6F,0x78,0x95,0x97,0x64,0xA1,0xCF,0xCE,0xC6,0xBB,0x90,0x65,0x3B,0x32,0x36,0x36,0x36,0x31,0x36,0x3F,0x4F,0x4F,0x37,0x1C,0x18,0x22,0x16,0x10,0x0E,0x0C,0x1D,0x30,0x48,0x63,0x8C,0xB9,0xD6,0xDF,0xE7, -0xE9,0xE0,0x98,0x37,0x1C,0x22,0x22,0x21,0x30,0x31,0x88,0xA5,0xA7,0xB2,0x9F,0x91,0x9F,0xB4,0xC7,0xD0,0x9C,0xA6,0x7C,0x73,0x60,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3F,0x58,0x49,0x1C,0x1A,0x1D,0x1D,0x1C,0x21,0x1D,0x22,0x30,0x48,0x63,0x8A,0xB9,0xD6,0xDF,0xE7, -0xDF,0xD6,0xDA,0x8A,0x49,0x21,0x11,0x18,0x30,0x29,0x35,0x34,0x42,0x2B,0x24,0x1F,0x17,0x25,0x39,0x55,0x54,0x6B,0x69,0x7D,0x5E,0x3C,0x22,0x10,0x1C,0x28,0x28,0x29,0x30,0x3F,0x63,0x3F,0x10,0x10,0x67,0xB9,0xC9,0x72,0x48,0x36,0x3F,0x63,0x8A,0xB9,0xD6,0xDF,0xE7, -0xD6,0xA4,0xDB,0x98,0x68,0x31,0x1A,0x21,0x30,0x22,0x21,0x22,0x21,0x13,0x7F,0x4E,0x02,0x18,0x98,0xAF,0x19,0x0A,0x12,0x43,0x27,0x30,0x16,0x00,0x0E,0x1D,0x22,0x22,0x28,0x29,0x58,0x67,0x1C,0x1D,0xA3,0xD3,0xB9,0x67,0x29,0x30,0x3F,0x63,0x8A,0xB9,0xD3,0xDF,0xE7, -0xC1,0x62,0x30,0x0C,0x0E,0x1A,0x15,0x28,0x29,0x22,0x21,0x1C,0x2F,0x2F,0x51,0x9A,0x11,0x52,0x58,0x48,0x7A,0x02,0x05,0x30,0x1C,0x21,0x22,0x02,0x00,0x16,0x1D,0x21,0x21,0x22,0x36,0x72,0x48,0x18,0x02,0x00,0x02,0x08,0x1A,0x29,0x3F,0x63,0x8A,0xB7,0xD3,0xDF,0xE7, -0xE9,0xE0,0xAE,0x1D,0x1A,0x30,0x49,0x48,0x22,0x21,0x1D,0x21,0x29,0x23,0x33,0x56,0x74,0x77,0x2C,0x18,0x83,0x02,0x03,0x30,0x21,0x1A,0x22,0x09,0x00,0x0E,0x1C,0x1C,0x1D,0x1D,0x21,0x59,0x79,0x29,0x22,0x21,0x1C,0x18,0x21,0x30,0x3F,0x62,0x81,0xB7,0xD3,0xDF,0xE7, -0xE7,0xDA,0x98,0x3F,0x11,0x15,0x0E,0x16,0x29,0x21,0x1D,0x1D,0x29,0x14,0x93,0xCC,0xB3,0x84,0xA0,0xBE,0x4B,0x02,0x01,0x28,0x1D,0x1D,0x1D,0x18,0x00,0x02,0x18,0x1A,0x1C,0x1A,0x1C,0x29,0x81,0x15,0x30,0x62,0x7B,0x48,0x3E,0x36,0x3F,0x62,0x81,0xB7,0xD3,0xDB,0xE7, -0xD7,0xC2,0xE9,0xB0,0x71,0x31,0x15,0x1C,0x28,0x21,0x1D,0x1D,0x28,0x1E,0xA6,0xD8,0xBD,0xA9,0xBC,0xC7,0x6A,0x04,0x02,0x20,0x1A,0x1C,0x1C,0x18,0x00,0x00,0x11,0x18,0x18,0x18,0x18,0x1A,0x68,0x1C,0xD2,0xE9,0xE9,0x80,0x36,0x29,0x3E,0x62,0x80,0xB0,0xD2,0xDB,0xE7, -0xC1,0x79,0x72,0x3F,0x31,0x21,0x0E,0x1D,0x28,0x1C,0x1D,0x1A,0x30,0x0F,0x6C,0xCD,0xD5,0xBA,0x8D,0xA8,0x57,0x0E,0x2A,0x10,0x21,0x1C,0x48,0x02,0x00,0x00,0x0E,0x16,0x16,0x16,0x16,0x18,0x31,0x18,0x18,0x15,0x11,0x10,0x1C,0x29,0x3E,0x59,0x80,0xB0,0xD2,0xDB,0xE7, -0xDA,0xD2,0x72,0x0E,0x0C,0x1D,0x30,0x37,0x22,0x1C,0x1D,0x1C,0x30,0x06,0xA2,0x92,0x9B,0x8F,0x87,0xBF,0xB1,0x0D,0x1B,0x09,0x1A,0x37,0x1A,0x02,0x00,0x00,0x10,0x18,0x16,0x16,0x16,0x18,0x11,0x21,0x18,0x11,0x11,0x11,0x1D,0x29,0x3E,0x59,0x80,0xB0,0xD2,0xDB,0xE7, -0xE9,0xE0,0x99,0x37,0x1A,0x22,0x21,0x21,0x22,0x1D,0x1C,0x29,0x1D,0x16,0xAE,0xAC,0xAB,0xAD,0xD1,0xDD,0xD6,0x46,0x02,0x04,0x0B,0x0E,0x00,0x00,0x00,0x00,0x1D,0x1C,0x18,0x18,0x16,0x18,0x10,0x1A,0x1D,0x30,0x30,0x30,0x29,0x29,0x3E,0x59,0x80,0xB0,0xD2,0xDB,0xE7, -0xDF,0xB9,0x98,0x62,0x22,0x1A,0x0C,0x16,0x22,0x1C,0x21,0x26,0x09,0x5B,0x8B,0xC5,0xCA,0xDC,0xE2,0xC0,0x72,0x7B,0x07,0x07,0x03,0x00,0x00,0x00,0x00,0x0C,0x18,0x1D,0x1C,0x18,0x18,0x18,0x10,0x3F,0xD6,0xE9,0xD3,0x59,0x29,0x29,0x3E,0x59,0x80,0xB0,0xD2,0xDB,0xE7, -0xCB,0xB0,0xE9,0xAE,0x72,0x30,0x11,0x1D,0x22,0x22,0x11,0x09,0x21,0xCB,0xCB,0xE0,0xE7,0xE9,0xDE,0x99,0x79,0xB7,0x1C,0x03,0x01,0x00,0x00,0x00,0x02,0x1A,0x15,0x15,0x21,0x1C,0x18,0x18,0x0E,0x31,0x67,0x62,0x29,0x1A,0x28,0x29,0x3E,0x62,0x81,0xB0,0xD3,0xDB,0xE7, -0xB9,0x8A,0x4F,0x11,0x10,0x18,0x0E,0x21,0x29,0x11,0x18,0x10,0x3F,0xCB,0xD2,0xD7,0xDC,0xE9,0xE6,0xC9,0xB6,0xB8,0x5A,0x01,0x00,0x00,0x00,0x00,0x08,0x29,0x29,0x16,0x15,0x1A,0x1A,0x15,0x02,0x0E,0x08,0x00,0x08,0x09,0x1D,0x29,0x3E,0x62,0x81,0xB7,0xD3,0xDB,0xE7, -0xE9,0xE0,0x98,0x15,0x11,0x1D,0x3E,0x37,0x02,0x0E,0x1C,0x02,0x8A,0xA3,0x71,0xB7,0xE1,0xE9,0xE6,0xDC,0xD9,0xD4,0xC4,0x28,0x02,0x00,0x00,0x09,0x02,0x00,0x00,0x02,0x0C,0x16,0x30,0x21,0x0E,0x21,0x28,0x21,0x1D,0x1A,0x22,0x29,0x3F,0x62,0x81,0xB7,0xD3,0xDF,0xE7, -0xE9,0xC1,0x67,0x28,0x0E,0x11,0x10,0x16,0x02,0x00,0x08,0x00,0x48,0x8C,0x8C,0xC3,0xDF,0xE0,0xD3,0x7B,0x82,0xCB,0xC9,0x71,0x01,0x00,0x09,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x1C,0x18,0x28,0x98,0xDF,0xC1,0x58,0x3E,0x29,0x3F,0x62,0x81,0xB7,0xD3,0xDF,0xE7, -0xD6,0xB9,0xD7,0x8C,0x59,0x31,0x10,0x1A,0x0C,0x00,0x00,0x00,0x02,0x18,0x1C,0x21,0x31,0x37,0x31,0x1A,0x1D,0x37,0x3D,0x28,0x03,0x00,0x0C,0x02,0x00,0x02,0x09,0x0E,0x0C,0x10,0x18,0x18,0x15,0x4F,0xC1,0xC9,0x71,0x30,0x21,0x29,0x3F,0x62,0x8A,0xB7,0xD3,0xDF,0xE7, -0xC2,0x8A,0xAE,0x63,0x49,0x28,0x09,0x1C,0x22,0x16,0x08,0x00,0x00,0x0C,0x18,0x11,0x10,0x10,0x0C,0x09,0x0C,0x0E,0x0E,0x10,0x11,0x15,0x1A,0x22,0x1C,0x1A,0x1D,0x1A,0x11,0x16,0x15,0x16,0x10,0x0C,0x00,0x00,0x00,0x00,0x1A,0x29,0x3F,0x62,0x81,0xB7,0xD3,0xDF,0xE7, -0xDB,0xDA,0x72,0x08,0x09,0x16,0x22,0x31,0x21,0x18,0x1A,0x16,0x08,0x09,0x15,0x18,0x11,0x16,0x16,0x15,0x11,0x11,0x16,0x16,0x15,0x15,0x11,0x11,0x11,0x15,0x15,0x15,0x11,0x11,0x15,0x18,0x15,0x1C,0x18,0x16,0x1D,0x18,0x21,0x29,0x3E,0x62,0x81,0xB7,0xD3,0xDF,0xE7, -0xE9,0xDF,0x8A,0x1D,0x15,0x1A,0x1C,0x21,0x22,0x1C,0x16,0x16,0x18,0x18,0x18,0x16,0x16,0x18,0x15,0x15,0x15,0x16,0x16,0x15,0x15,0x15,0x16,0x15,0x11,0x11,0x15,0x11,0x11,0x16,0x16,0x1A,0x16,0x16,0x58,0xC1,0xAE,0x59,0x3E,0x30,0x3E,0x62,0x81,0xB7,0xD3,0xDF,0xE7, -0xE7,0x98,0x50,0x36,0x16,0x18,0x09,0x18,0x28,0x1D,0x1A,0x16,0x16,0x16,0x16,0x16,0x16,0x16,0x16,0x15,0x16,0x16,0x15,0x16,0x15,0x15,0x11,0x11,0x11,0x15,0x15,0x15,0x11,0x11,0x11,0x1A,0x15,0x31,0xD2,0xCB,0x59,0x29,0x22,0x29,0x3E,0x59,0x80,0xB0,0xD3,0xDB,0xE7, -0xCB,0xB0,0xDB,0xA4,0x68,0x31,0x10,0x1C,0x28,0x21,0x1C,0x1A,0x16,0x18,0x18,0x1C,0x16,0x18,0x15,0x16,0x18,0x11,0x11,0x15,0x15,0x11,0x11,0x11,0x15,0x11,0x10,0x11,0x15,0x15,0x18,0x1C,0x15,0x18,0x15,0x00,0x02,0x09,0x08,0x21,0x3E,0x59,0x80,0xB0,0xD2,0xDB,0xE7, -0xC9,0xC1,0x80,0x36,0x21,0x1A,0x10,0x29,0x16,0x11,0x1A,0x0E,0x0C,0x15,0x11,0x1A,0x09,0x0E,0x11,0x16,0x10,0x09,0x0E,0x0E,0x16,0x08,0x09,0x0C,0x11,0x0E,0x08,0x0E,0x0C,0x16,0x08,0x0E,0x18,0x18,0x0C,0x08,0x15,0x16,0x1C,0x28,0x37,0x59,0x80,0xB0,0xD2,0xDB,0xE7, -0xE9,0xE0,0x81,0x0C,0x09,0x1A,0x29,0x08,0x0E,0x10,0x1C,0x0E,0x0C,0x11,0x16,0x1C,0x02,0x10,0x0E,0x1C,0x10,0x09,0x0E,0x10,0x1A,0x02,0x0E,0x0C,0x18,0x0E,0x09,0x0E,0x10,0x18,0x08,0x10,0x0C,0x18,0x18,0x16,0x10,0x16,0x21,0x29,0x37,0x58,0x7B,0xAE,0xD2,0xDB,0xE7, -0xE9,0xE0,0x99,0x21,0x1D,0x21,0x1C,0x50,0x72,0x1A,0x1D,0x11,0x71,0x72,0x1A,0x1C,0x16,0x99,0x30,0x1C,0x11,0x59,0x80,0x18,0x1A,0x15,0xA4,0x37,0x18,0x10,0x58,0xAE,0x15,0x18,0x15,0xCB,0x49,0x18,0x11,0x10,0x11,0x16,0x21,0x29,0x3E,0x59,0x80,0xAE,0xD2,0xDB,0xE7, -0xE9,0xE0,0xA3,0x1A,0x21,0x22,0x21,0xB9,0xCB,0x15,0x22,0x15,0xCB,0xC9,0x11,0x1D,0x22,0xE9,0x50,0x18,0x11,0x98,0xE7,0x10,0x1C,0x15,0xE9,0x68,0x16,0x10,0x71,0xE9,0x16,0x1A,0x10,0xE7,0x67,0x16,0x15,0x15,0x11,0x18,0x22,0x29,0x3E,0x62,0x80,0xB0,0xD2,0xDB,0xE7, -0xE9,0xE7,0xA3,0x1D,0x1C,0x28,0x30,0xDF,0xCB,0x1D,0x29,0x28,0xE0,0xD2,0x1A,0x22,0x50,0xE9,0x62,0x21,0x21,0xB0,0xE9,0x16,0x1C,0x29,0xE0,0x79,0x1C,0x1C,0x71,0xDB,0x21,0x18,0x21,0xB9,0x79,0x1A,0x15,0x11,0x10,0x18,0x22,0x30,0x48,0x63,0x8A,0xB9,0xD3,0xDF,0xE7, -0xE9,0xE7,0xD6,0x48,0x1C,0x31,0x18,0x7B,0x59,0x0C,0x16,0x18,0x62,0x50,0x0C,0x16,0x21,0x72,0x28,0x10,0x11,0x48,0x71,0x09,0x10,0x16,0x71,0x36,0x0E,0x0E,0x30,0x50,0x11,0x0E,0x0C,0x49,0x30,0x10,0x0C,0x08,0x10,0x1D,0x28,0x36,0x49,0x68,0x98,0xC2,0xD7,0xDF,0xE7, -0xE9,0xE9,0xE0,0xDA,0xC9,0xAE,0x7B,0x49,0x28,0x10,0x22,0x22,0x28,0x22,0x15,0x21,0x1D,0x30,0x1C,0x1D,0x1C,0x22,0x22,0x18,0x1D,0x16,0x31,0x21,0x21,0x15,0x29,0x31,0x1D,0x1A,0x1A,0x29,0x1C,0x21,0x21,0x1D,0x22,0x28,0x30,0x3E,0x58,0x79,0xA4,0xCB,0xDA,0xE0,0xE9, -0xE9,0xE9,0xE7,0xDF,0xD3,0xB9,0x98,0x59,0x36,0x22,0x31,0x3F,0x49,0x1D,0x21,0x28,0x67,0x1D,0x1C,0x22,0x29,0x4F,0x1A,0x1D,0x28,0x58,0x1C,0x1A,0x22,0x29,0x4F,0x1A,0x21,0x28,0x59,0x1C,0x22,0x28,0x28,0x28,0x29,0x31,0x37,0x4F,0x67,0x8A,0xB7,0xD3,0xDB,0xE7,0xE9, -0xE9,0xE9,0xE7,0xE0,0xD7,0xC9,0xAE,0x81,0x67,0x58,0x48,0x3E,0x37,0x36,0x36,0x36,0x36,0x36,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x36,0x36,0x36,0x3E,0x48,0x50,0x63,0x7B,0xA3,0xC2,0xD7,0xDF,0xE7,0xE9, -0xE9,0xE9,0xE9,0xE7,0xDB,0xD3,0xC1,0xA4,0x81,0x72,0x63,0x59,0x50,0x50,0x4F,0x4F,0x4F,0x4F,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x4F,0x50,0x58,0x63,0x71,0x80,0x99,0xB9,0xD2,0xDB,0xE0,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE7,0xE0,0xDA,0xD3,0xC2,0xB0,0x99,0x8A,0x7B,0x79,0x72,0x71,0x71,0x71,0x71,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x67,0x67,0x67,0x67,0x67,0x67,0x68,0x68,0x68,0x68,0x68,0x71,0x71,0x72,0x7B,0x8A,0x99,0xAE,0xC1,0xD2,0xDA,0xDF,0xE7,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE9,0xE7,0xE0,0xDB,0xD6,0xD2,0xC2,0xB7,0xAE,0xA3,0x99,0x99,0x99,0x99,0x98,0x98,0x98,0x98,0x98,0x98,0x98,0x98,0x8C,0x8C,0x8C,0x8C,0x8C,0x8C,0x8C,0x8C,0x98,0x98,0x98,0x98,0x98,0x99,0xA3,0xA4,0xB7,0xC2,0xCB,0xD6,0xDA,0xDF,0xE7,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE9,0xE9,0xE7,0xE0,0xDF,0xDA,0xD7,0xD3,0xCB,0xC9,0xC2,0xC2,0xC2,0xC2,0xC1,0xC1,0xC1,0xC1,0xC1,0xC1,0xC1,0xC1,0xC1,0xB9,0xB9,0xB9,0xB9,0xB9,0xB9,0xC1,0xC1,0xC1,0xC1,0xC1,0xC1,0xC2,0xC2,0xCB,0xD3,0xD7,0xDA,0xDF,0xE0,0xE7,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE7,0xE0,0xDF,0xDB,0xDA,0xDA,0xD7,0xD7,0xD7,0xD7,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD6,0xD7,0xD7,0xD7,0xDA,0xDB,0xDF,0xE0,0xE7,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE7,0xE7,0xE0,0xE0,0xE0,0xE0,0xE0,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xDF,0xE0,0xE0,0xE7,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9, -0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE7,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9,0xE9, -}; diff --git a/src/southbridge/amd/cs5530/chip.h b/src/southbridge/amd/cs5530/chip.h deleted file mode 100644 index fec40ef36e..0000000000 --- a/src/southbridge/amd/cs5530/chip.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef SOUTHBRIDGE_AMD_CS5530_CHIP_H -#define SOUTHBRIDGE_AMD_CS5530_CHIP_H - -struct southbridge_amd_cs5530_config { - int ide0_enable:1; - int ide1_enable:1; -}; - -#endif /* SOUTHBRIDGE_AMD_CS5530_CHIP_H */ diff --git a/src/southbridge/amd/cs5530/cs5530.c b/src/southbridge/amd/cs5530/cs5530.c deleted file mode 100644 index 2b97fe0431..0000000000 --- a/src/southbridge/amd/cs5530/cs5530.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Datasheet: - * - Name: Geode CS5530A I/O Companion Multi-Function South Bridge - * - URL: http://www.national.com/pf/CS/CS5530A.html - * - PDF: http://www.national.com/ds.cgi/CS/CS5530A.pdf - * - Revision: 1.1 (May 2001) - */ - -/* Datasheet: - * - Name: AMD Geode CS5530A Companion Device Data Book - * - URL: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_9919,00.html - * - PDF: http://www.amd.com/files/connectivitysolutions/geode/5530a_db_v11.pdf - * - Date: October 2003 - * - Publication ID: May 2001, Revision 1.1 - */ - -/* Datasheet: - * - Name: AMD Geode Solutions - * Integrated Processors, Companion Devices, and System Platforms - * (Geode CS5530 I/O Companion Multi-Function South Bridge) - * - URL: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_9919,00.html - * - PDF: http://www.amd.com/files/connectivitysolutions/geode/5530_db_v41.pdf - * - Date: September 2004 - */ - -/* Note: The CS3350 / CS3350A are mostly identical. This code handles both. */ - -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include "cs5530.h" - -void cs5530_enable(device_t dev) -{ -} - -struct chip_operations southbridge_amd_cs5530_ops = { - CHIP_NAME("AMD Geode CS5530/CS5530A I/O Companion Southbridge") - .enable_dev = cs5530_enable, -}; diff --git a/src/southbridge/amd/cs5530/cs5530.h b/src/southbridge/amd/cs5530/cs5530.h deleted file mode 100644 index b90e218ab3..0000000000 --- a/src/southbridge/amd/cs5530/cs5530.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef SOUTHBRIDGE_AMD_CS5530_CS5530_H -#define SOUTHBRIDGE_AMD_CS5530_CS5530_H - -#if !defined(__PRE_RAM__) -#include "chip.h" -void cs5530_enable(device_t dev); -#endif - -#define DECODE_CONTROL_REG2 0x5b /* F0 index 0x5b */ -#define ROM_AT_LOGIC_CONTROL_REG 0x52 /* F0 index 0x52 */ - -#define LOWER_ROM_ADDRESS_RANGE (1 << 0) -#define ROM_WRITE_ENABLE (1 << 1) -#define UPPER_ROM_ADDRESS_RANGE (1 << 2) -#define BIOS_ROM_POSITIVE_DECODE (1 << 5) - -/* Selects PCI positive decoding for accesses to the configured ROM space. */ -#define BIOS_ROM_POSITIVE_DECODE (1 << 5) - -/* Primary IDE Controller Positive Decode (i.e., enable it). */ -#define PRIMARY_IDE_ENABLE (1 << 3) - -/* Secondary IDE Controller Positive Decode (i.e., enable it). */ -#define SECONDARY_IDE_ENABLE (1 << 4) - -#endif /* SOUTHBRIDGE_AMD_CS5530_CS5530_H */ diff --git a/src/southbridge/amd/cs5530/enable_rom.c b/src/southbridge/amd/cs5530/enable_rom.c deleted file mode 100644 index 1c8079703c..0000000000 --- a/src/southbridge/amd/cs5530/enable_rom.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include "cs5530.h" - -static void cs5530_enable_rom(void) -{ - uint8_t reg8; - - /* So far all CS5530(A) ISA bridges we've seen are at 00:12.0. */ - device_t dev = PCI_DEV(0, 0x12, 0); - - /* - * Decode 0x000E0000-0x000FFFFF (128 KB), not just 64 KB, and - * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 KB. - * - * Make the ROM write-protected. - */ - reg8 = pci_read_config8(dev, ROM_AT_LOGIC_CONTROL_REG); - reg8 |= LOWER_ROM_ADDRESS_RANGE; - reg8 |= UPPER_ROM_ADDRESS_RANGE; - reg8 &= ~ROM_WRITE_ENABLE; - pci_write_config8(dev, ROM_AT_LOGIC_CONTROL_REG, reg8); - - /* Set positive decode on ROM. */ - reg8 = pci_read_config8(dev, DECODE_CONTROL_REG2); - reg8 |= BIOS_ROM_POSITIVE_DECODE; - pci_write_config8(dev, DECODE_CONTROL_REG2, reg8); -} diff --git a/src/southbridge/amd/cs5530/ide.c b/src/southbridge/amd/cs5530/ide.c deleted file mode 100644 index 74761fba58..0000000000 --- a/src/southbridge/amd/cs5530/ide.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include "cs5530.h" - -/** - * Initialize the IDE controller. - * - * Depending on the configuration variables 'ide0_enable' and 'ide1_enable' - * enable or disable the primary and secondary IDE interface, respectively. - * - * @param dev The device to use. - */ -static void ide_init(struct device *dev) -{ - uint8_t reg8; - struct southbridge_amd_cs5530_config *conf = dev->chip_info; - - reg8 = pci_read_config8(dev, DECODE_CONTROL_REG2); - - /* Enable/disable the primary IDE interface. */ - if (conf->ide0_enable) { - reg8 |= PRIMARY_IDE_ENABLE; - } else { - reg8 &= ~(PRIMARY_IDE_ENABLE); - } - - /* Enable/disable the secondary IDE interface. */ - if (conf->ide1_enable) { - reg8 |= SECONDARY_IDE_ENABLE; - } else { - reg8 &= ~(SECONDARY_IDE_ENABLE); - } - - pci_write_config8(dev, DECODE_CONTROL_REG2, reg8); - - printk(BIOS_INFO, "%s IDE interface %s\n", "Primary", - conf->ide0_enable ? "enabled" : "disabled"); - printk(BIOS_INFO, "%s IDE interface %s\n", "Secondary", - conf->ide1_enable ? "enabled" : "disabled"); -} - -static struct device_operations ide_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = ide_init, - .enable = 0, - .scan_bus = scan_static_bus, - .ops_pci = 0, -}; - -static const struct pci_driver ide_driver __pci_driver = { - .ops = &ide_ops, - .vendor = PCI_VENDOR_ID_CYRIX, - .device = PCI_DEVICE_ID_CYRIX_5530_IDE, -}; diff --git a/src/southbridge/amd/cs5530/isa.c b/src/southbridge/amd/cs5530/isa.c deleted file mode 100644 index ef3d93afd8..0000000000 --- a/src/southbridge/amd/cs5530/isa.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <console/console.h> -#include <arch/io.h> -#include <arch/ioapic.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include "cs5530.h" - -static void cs5530_read_resources(device_t dev) -{ - struct resource* res; - - pci_dev_read_resources(dev); - - res = new_resource(dev, 1); - res->base = 0x0UL; - res->size = 0x1000UL; - res->limit = 0xffffUL; - res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - - res = new_resource(dev, 3); /* IOAPIC */ - res->base = IO_APIC_ADDR; - res->size = 0x00001000; - res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; -} - -static void isa_init(struct device *dev) -{ -} - -static struct device_operations isa_ops = { - .read_resources = cs5530_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = isa_init, - .enable = 0, - .scan_bus = scan_static_bus, -}; - -static const struct pci_driver isa_driver __pci_driver = { - .ops = &isa_ops, - .vendor = PCI_VENDOR_ID_CYRIX, - .device = PCI_DEVICE_ID_CYRIX_5530_LEGACY, -}; diff --git a/src/southbridge/amd/cs5530/pirq.c b/src/southbridge/amd/cs5530/pirq.c deleted file mode 100644 index f26b722ec3..0000000000 --- a/src/southbridge/amd/cs5530/pirq.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/pirq_routing.h> -#include <console/console.h> -#include <device/pci.h> -#include <device/pci_ids.h> - -#if (CONFIG_PIRQ_ROUTE==1 && CONFIG_GENERATE_PIRQ_TABLE==1) -void pirq_assign_irqs(const unsigned char pIntAtoD[4]) -{ - device_t pdev; - - pdev = dev_find_device(PCI_VENDOR_ID_CYRIX, - PCI_DEVICE_ID_CYRIX_5530_LEGACY, 0); - - if (pdev) { - pci_write_config8(pdev, 0x5c, (pIntAtoD[1] << 4 | pIntAtoD[0])); - pci_write_config8(pdev, 0x5d, (pIntAtoD[3] << 4 | pIntAtoD[2])); - } -} -#endif diff --git a/src/southbridge/amd/cs5530/vga.c b/src/southbridge/amd/cs5530/vga.c deleted file mode 100644 index 66ab239efc..0000000000 --- a/src/southbridge/amd/cs5530/vga.c +++ /dev/null @@ -1,495 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -/** - * @brief Activate the VGA feature in a Geode GX1 based system with one - * of five possible VESA modes: VGA, SVGA, XGA, 4:3 SXGA and 5:4 SXGA. - * Also it is prepared to display a splash screen. - * - * In a Geode GX1 environment the companion CS5530 is the VGA - * interface only. It contains a PLL for pixel clock generation, - * DACs to generate the analogue RGB signals, drivers for HSYNC - * and VSYNC and drivers for a digital flatpanel. - * The graphic feature itself (framebuffer, acceleration unit) - * is not part of this device. It is part of the CPU device. - * But both depend on each other, we cannot divide them into - * different drivers. So this driver is not only a CS5530 driver, - * it is also a Geode GX1 chipset graphic driver. - */ -#include <arch/io.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#include <device/pci_ids.h> -#include <console/console.h> -#include <cpu/amd/gx1def.h> -#include <delay.h> - -#if CONFIG_GX1_VIDEO -/* - * Some register descriptions that are no listed in cpu/amd/gx1def.h - */ -#define CS5530_DOT_CLK_CONFIG 0x0024 -#define CS5530_DISPLAY_CONFIG 0x0004 - -#define DC_FB_ST_OFFSET 0x8310 /* framebuffer start offset */ -#define DC_CB_ST_OFFSET 0x8314 /* compression start offset */ -#define DC_CURS_ST_OFFSET 0x8318 /* cursor start offset */ -#define DC_VID_ST_OFFSET 0x8320 /* video start offset */ -#define DC_LINE_DELTA 0x8324 /* fb and cb skip counts */ -#define DC_BUF_SIZE 0x8328 /* fb and cb line size */ -#define DC_H_TIMING_1 0x8330 /* horizontal timing... */ -#define DC_H_TIMING_2 0x8334 -#define DC_H_TIMING_3 0x8338 -#define DC_FP_H_TIMING 0x833C -#define DC_V_TIMING_1 0x8340 /* vertical timing... */ -#define DC_V_TIMING_2 0x8344 -#define DC_V_TIMING_3 0x8348 -#define DC_FP_V_TIMING 0x834C -#define DC_TIMING_CFG 0x8308 -#define DC_OUTPUT_CFG 0x830C - -/** - * what colour depth should be used as default (in bpp) - * Note: Currently no other value than 16 is supported - */ -#define COLOUR_DEPTH 16 - -/** - * Support for a few basic video modes - * Note: all modes only for CRT. The flatpanel feature is - * not supported here (due to the lack of hardware to test) - */ -struct video_mode { - int pixel_clock; /*<< pixel clock in Hz */ - unsigned long pll_value; /*<< pll register value for this clock */ - - int visible_pixel; /*<< visible pixels in one line */ - int hsync_start; /*<< start of hsync behind visible pixels */ - int hsync_end; /*<< end of hsync behind its start */ - int line_length; /*<< whole line length */ - - int visible_lines; /*<< visible lines on screen */ - int vsync_start; /*<< vsync start behind last visible line */ - int vsync_end; /*<< end of vsync behind its start */ - int picture_length; /*<< whole screen length */ - - int sync_pol; /*<< 0: low, 1: high, bit 0 hsync, bit 1 vsync */ -}; - -/* - * values for .sync_pol in struct video_mode - */ -#define HSYNC_HIGH_POL 0 -#define HSYNC_LOW_POL 1 -#define VSYNC_HIGH_POL 0 -#define VSYNC_LOW_POL 2 - -/** - * 640x480 @ 72Hz hsync: 37.9kHz - * VESA standard mode for classic 4:3 monitors - * Copied from X11: - * ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync - */ -static const struct video_mode mode_640x480 = { - .pixel_clock = 31500000, - .pll_value = 0x33915801, - - .visible_pixel = 640, - .hsync_start = 664, - .hsync_end = 704, /* 1.27 us sync length */ - .line_length = 832, /* 26.39us */ - - .visible_lines = 480, - .vsync_start = 489, - .vsync_end = 491, - .picture_length = 520, /* 13.89ms */ - - .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL, -}; - -/** - * 800x600 @ 72Hz hsync: 48.1kHz - * VESA standard mode for classic 4:3 monitors - * Copied from X11: - * ModeLine "800x600" 50.0 800 856 976 1040 600 637 643 666 +hsync +vsync - */ -static const struct video_mode mode_800x600 = { - .pixel_clock = 50000000, - .pll_value = 0x23088801, - - .visible_pixel = 800, - .hsync_start = 856, - .hsync_end = 976, - .line_length = 1040, /* 20.8us */ - - .visible_lines = 600, - .vsync_start = 637, - .vsync_end = 643, - .picture_length = 666, /* 13.89ms */ - - .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL, -}; - -/** - * 1024x768 @ 70Hz (VESA) hsync: 56.5kHz - * Standard mode for classic 4:3 monitors - * Copied from X11: - * ModeLine "1024x768" 75.0 1024 1048 1184 1328 768 771 777 806 -hsync -vsync - */ -static const struct video_mode mode_1024x768 = { - .pixel_clock = 75000000, - .pll_value = 0x37E22801, - - .visible_pixel = 1024, - .hsync_start = 1048, - .hsync_end = 1184, - .line_length = 1328, /* 17.7us */ - - .visible_lines = 768, - .vsync_start = 771, - .vsync_end = 777, - .picture_length = 806, /* 14.3us */ - - .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL, -}; - -/** - * 1280x960 @ 60Hz (VESA) hsync: 60.0kHz - * Mode for classic 4:3 monitors - * Copied from X11: - * ModeLine "1280x960" 108.0 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync - */ -static const struct video_mode mode_1280x960 = { - .pixel_clock = 108000000, - .pll_value = 0x2710C805, - - .visible_pixel = 1280, - .hsync_start = 1376, - .hsync_end = 1488, - .line_length = 1800, /* 16.67us */ - - .visible_lines = 960, - .vsync_start = 961, - .vsync_end = 964, - .picture_length = 1000, /* 16.67ms */ - - .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL, -}; - -/** - * 1280x1024 @ 60Hz (VESA) hsync: 64.0kHz - * Mode for modern 5:4 flat screens - * Copied from X11: - * ModeLine "1280x1024" 108.0 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync - */ -static const struct video_mode mode_1280x1024 = { - .pixel_clock = 108000000, - .pll_value = 0x2710C805, - - .visible_pixel = 1280, - .hsync_start = 1328, - .hsync_end = 1440, - .line_length = 1688, /* 15.6us */ - - .visible_lines = 1024, - .vsync_start = 1025, - .vsync_end = 1028, - .picture_length = 1066, - - .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL, -}; - -/** - * List of supported common modes - */ -static const struct video_mode *modes[] = { - &mode_640x480, /* CONFIG_GX1_VIDEOMODE = 0 */ - &mode_800x600, /* CONFIG_GX1_VIDEOMODE = 1 */ - &mode_1024x768, /* CONFIG_GX1_VIDEOMODE = 2 */ - &mode_1280x960, /* CONFIG_GX1_VIDEOMODE = 3 */ - &mode_1280x1024 /* CONFIG_GX1_VIDEOMODE = 4 */ -}; - -/* make a sanity check at buildtime */ -#if CONFIG_GX1_VIDEOMODE > 4 -# error Requested video mode is unknown! -#endif - -/** - * Setup the pixel PLL in the companion chip - * @param[in] base register's base address - * @param[in] pll_val pll register value to be set - * - * The PLL to program here is located in the CS5530 - */ -static void cs5530_set_clock_frequency(u32 io_base, unsigned long pll_val) -{ - unsigned long reg; - - /* disable the PLL first, reset and power it down */ - reg = read32(io_base+CS5530_DOT_CLK_CONFIG) & ~0x20; - reg |= 0x80000100; - write32(io_base+CS5530_DOT_CLK_CONFIG, reg); - - /* write the new PLL setting */ - reg |= (pll_val & ~0x80000920); - write32(io_base+CS5530_DOT_CLK_CONFIG, reg); - - mdelay(1); /* wait for control voltage to be 0V */ - - /* enable the PLL */ - reg |= 0x00000800; - write32(io_base+CS5530_DOT_CLK_CONFIG, reg); - - /* clear reset */ - reg &= ~0x80000000; - write32(io_base+CS5530_DOT_CLK_CONFIG, reg); - - /* clear bypass */ - reg &= ~0x00000100; - write32(io_base+CS5530_DOT_CLK_CONFIG, reg); -} - -/** - * Setup memory layout - * @param[in] gx_base GX register area - * @param[in] mode Data about the video mode to setup - * - * Memory layout must be setup in Geode GX1's chipset. - * Note: This routine assumes unlocked DC registers. - * Note: Using compressed buffer is not supported yet! - * (makes more sense later, but not while booting) - * - * At this point a check is missed if the requested video - * mode is possible with the provided video memory. - * Check if symbol CONFIG_VIDEO_MB is at least: - * - 1 (=1MiB) for VGA and SVGA - * - 2 (=2MiB) for XGA - * - 4 (=4MiB) for SXGA - */ -static void dc_setup_layout(u32 gx_base, const struct video_mode *mode) -{ - u32 base = 0x00000000; - - write32(gx_base + DC_FB_ST_OFFSET, base); - - base += (COLOUR_DEPTH>>3) * mode->visible_pixel * mode->visible_lines; - - write32(gx_base + DC_CB_ST_OFFSET, base); - write32(gx_base + DC_CURS_ST_OFFSET, base); - write32(gx_base + DC_VID_ST_OFFSET, base); - write32(gx_base + DC_LINE_DELTA, ((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 2); - write32(gx_base + DC_BUF_SIZE, ((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 3); -} - -/** - * Setup the HSYNC/VSYNC, active video timing - * @param[in] gx_base GX register area - * @param[in] mode Data about the video mode to setup - * - * Sync signal generation is done in Geode GX1's chipset. - * Note: This routine assumes unlocked DC registers - * - * |<------------------------- htotal ----------------------------->| - * |<------------ hactive -------------->| | - * | hblankstart-->| | - * | hblankend-->| - * | hsyncstart-->| | - * | hsyncend-->| | - * |#####################################___________________________| RGB data - * |______________________________________________---------_________| HSYNC - * - * |<------------------------- vtotal ----------------------------->| - * |<------------ vactive -------------->| | - * | vblankstart-->| | - * | vblankend-->| - * | vsyncstart-->| | - * | vsyncend-->| | - * |#####################################___________________________| line data - * |______________________________________________---------_________| YSYNC - */ -static void dc_setup_timing(u32 gx_base, const struct video_mode *mode) -{ - u32 hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; - u32 vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal; - - hactive = mode->visible_pixel & 0x7FF; - hblankstart = hactive; - hsyncstart = mode->hsync_start & 0x7FF; - hsyncend = mode->hsync_end & 0x7FF; - hblankend = mode->line_length & 0x7FF; - htotal = hblankend; - - vactive = mode->visible_lines & 0x7FF; - vblankstart = vactive; - vsyncstart = mode->vsync_start & 0x7FF; - vsyncend = mode->vsync_end & 0x7FF; - vblankend = mode->picture_length & 0x7FF; - vtotal = vblankend; - - /* row description */ - write32(gx_base + DC_H_TIMING_1, (hactive - 1) | ((htotal - 1) << 16)); - /* horizontal blank description */ - write32(gx_base + DC_H_TIMING_2, (hblankstart - 1) | ((hblankend - 1) << 16)); - /* horizontal sync description */ - write32(gx_base + DC_H_TIMING_3, (hsyncstart - 1) | ((hsyncend - 1) << 16)); - write32(gx_base + DC_FP_H_TIMING, (hsyncstart - 1) | ((hsyncend - 1) << 16)); - - /* line description */ - write32(gx_base + DC_V_TIMING_1, (vactive - 1) | ((vtotal - 1) << 16)); - /* vertical blank description */ - write32(gx_base + DC_V_TIMING_2, (vblankstart - 1) | ((vblankend - 1) << 16)); - /* vertical sync description */ - write32(gx_base + DC_V_TIMING_3, (vsyncstart - 1) | ((vsyncend - 1) << 16)); - write32(gx_base + DC_FP_V_TIMING, (vsyncstart - 2) | ((vsyncend - 2) << 16)); -} - -/** - * Setup required internals to bring the mode up and running - * @param[in] gx_base GX register area - * @param[in] mode Data about the video mode to setup - * - * Must be setup in Geode GX1's chipset. - * Note: This routine assumes unlocked DC registers. - */ -static void cs5530_activate_mode(u32 gx_base, const struct video_mode *mode) -{ - write32(gx_base + DC_GENERAL_CFG, 0x00000080); - mdelay(1); - dc_setup_layout(gx_base,mode); - dc_setup_timing(gx_base,mode); - - write32(gx_base + DC_GENERAL_CFG, 0x2000C581); - write32(gx_base + DC_TIMING_CFG, 0x0000002F); - write32(gx_base + DC_OUTPUT_CFG, 0x00003004); -} - -/** - * Activate the current mode to be "visible" outside - * @param[in] gx_base GX register area - * @param[in] mode Data about the video mode to setup - * - * As we now activate the interface this must be done - * in the CS5530 - */ -static void cs5530_activate_video(u32 io_base, const struct video_mode *mode) -{ - u32 val; - - val = (u32)mode->sync_pol << 8; - write32(io_base + CS5530_DISPLAY_CONFIG, val | 0x0020002F); -} - -#if CONFIG_SPLASH_GRAPHIC - -/* - * This bitmap file must provide: - * int width: pixel count in one line - * int height: line count - * int colours: ount of used colour - * unsigned long colour_map[]: RGB 565 colours to be used - * unsigned char bitmap[]: index per pixel into colour_map[], width*height pixels - */ -#include "bitmap.c" - -/* - * show a boot splash screen in the right lower corner of the screen - * swidth: screen width in pixel - * sheight: screen height in lines - * pitch: line pitch in bytes - * base: screen base address - * - * This routine assumes we are using a 16 bit colour depth! - */ -static void show_boot_splash_16(u32 swidth, u32 sheight, u32 pitch,void *base) -{ - int word_count,i; - unsigned short *adr; - u32 xstart,ystart,x,y; - /* - * fill the screen with the colour of the - * left top pixel in the graphic - */ - word_count = pitch * sheight; - adr = (unsigned short*)base; - for (i = 0; i < word_count; i++, adr++) - *adr = colour_map[bitmap[0]]; - - /* - * paint the splash - */ - xstart = swidth-width; - ystart = sheight-height; - for (y = 0; y < height; y++) { - adr=(unsigned short*)(base + pitch*(y+ystart) + 2 * xstart); - for (x = 0; x < width; x++) { - *adr=(unsigned short)colour_map[(int)bitmap[x + y * width]]; - adr++; - } - } -} -#else -# define show_boot_splash_16(w, x, y , z) -#endif - -/** - * coreboot management part - * @param[in] dev Info about the PCI device to initialise - */ -static void cs5530_vga_init(device_t dev) -{ - const struct video_mode *mode; - u32 io_base, gx_base; - - io_base = pci_read_config32(dev, 0x10); - gx_base = GX_BASE; - mode = modes[CONFIG_GX1_VIDEOMODE]; - - printk(BIOS_DEBUG, "Setting up video mode %dx%d with %d Hz clock\n", - mode->visible_pixel, mode->visible_lines, mode->pixel_clock); - - cs5530_set_clock_frequency(io_base, mode->pll_value); - - write32(gx_base + DC_UNLOCK, DC_UNLOCK_MAGIC); - - show_boot_splash_16(mode->visible_pixel, mode->visible_lines, - mode->visible_pixel * (COLOUR_DEPTH>>3), (void*)(GX_BASE + 0x800000)); - - cs5530_activate_mode(gx_base, mode); - - cs5530_activate_video(io_base, mode); - write32(gx_base + DC_UNLOCK, 0x00000000); -} - -static struct device_operations vga_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = cs5530_vga_init, - .enable = NULL, /* not required */ -}; - -static const struct pci_driver vga_pci_driver __pci_driver = { - .ops = &vga_ops, - .vendor = PCI_VENDOR_ID_CYRIX, - .device = PCI_DEVICE_ID_CYRIX_5530_VIDEO, -}; - -#endif /* #if CONFIG_GX1_VIDEO */ |