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-rw-r--r--src/southbridge/amd/cimx/sb700/Platform.h2
-rw-r--r--src/southbridge/amd/cimx/sb700/reset.c2
-rw-r--r--src/southbridge/amd/cimx/sb800/early.c4
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c54
-rw-r--r--src/southbridge/amd/cimx/sb800/reset.c2
-rw-r--r--src/southbridge/amd/cimx/sb800/smbus.c8
-rw-r--r--src/southbridge/amd/cimx/sb900/cfg.c4
-rw-r--r--src/southbridge/amd/cimx/sb900/early.c2
-rw-r--r--src/southbridge/amd/cimx/sb900/late.c98
-rw-r--r--src/southbridge/amd/cimx/sb900/reset.c2
-rw-r--r--src/southbridge/amd/cimx/sb900/smbus.c8
11 files changed, 93 insertions, 93 deletions
diff --git a/src/southbridge/amd/cimx/sb700/Platform.h b/src/southbridge/amd/cimx/sb700/Platform.h
index 7562417dd7..7476cb96fa 100644
--- a/src/southbridge/amd/cimx/sb700/Platform.h
+++ b/src/southbridge/amd/cimx/sb700/Platform.h
@@ -62,7 +62,7 @@ void TraceCode ( UINT32 Level, UINT32 Code);
#if CONFIG_REDIRECT_SBCIMX_TRACE_TO_SERIAL
#define TRACE(Arguments) printk Arguments
#else
- #define TRACE(Arguments) do {} while(0)
+ #define TRACE(Arguments) do {} while (0)
#endif
#define TRACECODE(Arguments)
#endif
diff --git a/src/southbridge/amd/cimx/sb700/reset.c b/src/southbridge/amd/cimx/sb700/reset.c
index 9a987602d3..a5c42b72c9 100644
--- a/src/southbridge/amd/cimx/sb700/reset.c
+++ b/src/southbridge/amd/cimx/sb700/reset.c
@@ -32,7 +32,7 @@ static inline void set_bios_reset(void)
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
- for(i = 0; i < nodes; i++) {
+ for (i = 0; i < nodes; i++) {
dev = NODE_PCI(i, 0);
htic = pci_read_config32(dev, HT_INIT_CONTROL);
htic &= ~HTIC_BIOSR_Detect;
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 2a10c0ed49..866353d692 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -66,6 +66,6 @@ void sb800_clk_output_48Mhz(void)
/* AcpiMMioDecodeEn */
RWPMIO(SB_PMIOA_REG24, AccWidthUint8, ~(BIT0 + BIT1), BIT0);
- *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
- *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) |= 1 << 1; /* 48Mhz */
+ *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
+ *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) |= 1 << 1; /* 48Mhz */
}
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 693190fdf9..fa47a96f2e 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -151,21 +151,21 @@ unsigned long acpi_fill_mcfg(unsigned long current)
}
static struct device_operations lpc_ops = {
- .read_resources = lpc_read_resources,
- .set_resources = lpc_set_resources,
- .enable_resources = pci_dev_enable_resources,
+ .read_resources = lpc_read_resources,
+ .set_resources = lpc_set_resources,
+ .enable_resources = pci_dev_enable_resources,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.write_acpi_tables = acpi_write_hpet,
#endif
- .init = lpc_init,
- .scan_bus = scan_lpc_bus,
- .ops_pci = &lops_pci,
+ .init = lpc_init,
+ .scan_bus = scan_lpc_bus,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver lpc_driver __pci_driver = {
- .ops = &lpc_ops,
- .vendor = PCI_VENDOR_ID_ATI,
- .device = PCI_DEVICE_ID_ATI_SB800_LPC,
+ .ops = &lpc_ops,
+ .vendor = PCI_VENDOR_ID_ATI,
+ .device = PCI_DEVICE_ID_ATI_SB800_LPC,
};
static struct device_operations sata_ops = {
@@ -226,34 +226,34 @@ static const struct pci_driver usb_ohci4_driver __pci_driver = {
static struct device_operations azalia_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = 0,
- .scan_bus = 0,
- .ops_pci = &lops_pci,
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = 0,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver azalia_driver __pci_driver = {
- .ops = &azalia_ops,
- .vendor = PCI_VENDOR_ID_ATI,
- .device = PCI_DEVICE_ID_ATI_SB800_HDA,
+ .ops = &azalia_ops,
+ .vendor = PCI_VENDOR_ID_ATI,
+ .device = PCI_DEVICE_ID_ATI_SB800_HDA,
};
static struct device_operations gec_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = 0,
- .scan_bus = 0,
- .ops_pci = &lops_pci,
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = 0,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver gec_driver __pci_driver = {
- .ops = &gec_ops,
- .vendor = PCI_VENDOR_ID_ATI,
- .device = PCI_DEVICE_ID_ATI_SB800_GEC,
+ .ops = &gec_ops,
+ .vendor = PCI_VENDOR_ID_ATI,
+ .device = PCI_DEVICE_ID_ATI_SB800_GEC,
};
/**
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index 9a987602d3..a5c42b72c9 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -32,7 +32,7 @@ static inline void set_bios_reset(void)
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
- for(i = 0; i < nodes; i++) {
+ for (i = 0; i < nodes; i++) {
dev = NODE_PCI(i, 0);
htic = pci_read_config32(dev, HT_INIT_CONTROL);
htic &= ~HTIC_BIOSR_Detect;
diff --git a/src/southbridge/amd/cimx/sb800/smbus.c b/src/southbridge/amd/cimx/sb800/smbus.c
index 93ac0aa4ab..80395f1231 100644
--- a/src/southbridge/amd/cimx/sb800/smbus.c
+++ b/src/southbridge/amd/cimx/sb800/smbus.c
@@ -63,7 +63,7 @@ int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_recv_byte - smbus not ready.\n");
+ printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_recv_byte - smbus not ready.\n");
return -2; /* not ready */
}
@@ -93,7 +93,7 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_send_byte - smbus not ready.\n");
+ printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_send_byte - smbus not ready.\n");
return -2; /* not ready */
}
@@ -123,7 +123,7 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_read_byte - smbus not ready.\n");
+ printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_read_byte - smbus not ready.\n");
return -2; /* not ready */
}
@@ -156,7 +156,7 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_write_byte - smbus not ready.\n");
+ printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_write_byte - smbus not ready.\n");
return -2; /* not ready */
}
diff --git a/src/southbridge/amd/cimx/sb900/cfg.c b/src/southbridge/amd/cimx/sb900/cfg.c
index be54197c42..bc7e742b28 100644
--- a/src/southbridge/amd/cimx/sb900/cfg.c
+++ b/src/southbridge/amd/cimx/sb900/cfg.c
@@ -28,7 +28,7 @@
void sb900_cimx_config(AMDSBCFG *sb_config)
{
if (!sb_config) {
- printk(BIOS_INFO, "SB900 - Cfg.c - sb900_cimx_config - No sb_config.\n");
+ printk(BIOS_INFO, "SB900 - Cfg.c - sb900_cimx_config - No sb_config.\n");
return;
}
printk(BIOS_INFO, "SB900 - Cfg.c - sb900_cimx_config - Start.\n");
@@ -257,7 +257,7 @@ void sb900_cimx_config(AMDSBCFG *sb_config)
void SbPowerOnInit_Config(AMDSBCFG *sb_config)
{
if (!sb_config) {
- printk(BIOS_INFO, "SB900 - Cfg.c - SbPowerOnInit_Config - No sb_config.\n");
+ printk(BIOS_INFO, "SB900 - Cfg.c - SbPowerOnInit_Config - No sb_config.\n");
return;
}
printk(BIOS_INFO, "SB900 - Cfg.c - SbPowerOnInit_Config - Start.\n");
diff --git a/src/southbridge/amd/cimx/sb900/early.c b/src/southbridge/amd/cimx/sb900/early.c
index 10645e14a4..d39de4b272 100644
--- a/src/southbridge/amd/cimx/sb900/early.c
+++ b/src/southbridge/amd/cimx/sb900/early.c
@@ -60,7 +60,7 @@ void sb_poweron_init(void)
outb(0xEA, 0xCD6);
data = inb(0xCD7);
data &= !BIT0;
- if(!CONFIG_PCIB_ENABLE) {
+ if (!CONFIG_PCIB_ENABLE) {
data |= BIT0;
}
outb(data, 0xCD7);
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c
index f078c51583..65c2446327 100644
--- a/src/southbridge/amd/cimx/sb900/late.c
+++ b/src/southbridge/amd/cimx/sb900/late.c
@@ -121,21 +121,21 @@ unsigned long acpi_fill_mcfg(unsigned long current)
}
static struct device_operations lpc_ops = {
- .read_resources = lpc_read_resources,
- .set_resources = lpc_set_resources,
- .enable_resources = lpc_enable_resources,
- .init = lpc_init,
+ .read_resources = lpc_read_resources,
+ .set_resources = lpc_set_resources,
+ .enable_resources = lpc_enable_resources,
+ .init = lpc_init,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.write_acpi_tables = acpi_write_hpet,
#endif
- .scan_bus = scan_lpc_bus,
- .ops_pci = &lops_pci,
+ .scan_bus = scan_lpc_bus,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver lpc_driver __pci_driver = {
- .ops = &lpc_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_LPC,
+ .ops = &lpc_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_LPC,
};
@@ -239,18 +239,18 @@ static void azalia_init(struct device *dev)
}
static struct device_operations azalia_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = azalia_init,
- .scan_bus = 0,
- .ops_pci = &lops_pci,
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = azalia_init,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver azalia_driver __pci_driver = {
- .ops = &azalia_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_HDA,
+ .ops = &azalia_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_HDA,
};
@@ -263,18 +263,18 @@ static void gec_init(struct device *dev)
}
static struct device_operations gec_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = gec_init,
- .scan_bus = 0,
- .ops_pci = &lops_pci,
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = gec_init,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver gec_driver __pci_driver = {
- .ops = &gec_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_GEC,
+ .ops = &gec_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_GEC,
};
@@ -286,19 +286,19 @@ static void pcie_init(device_t dev)
}
static struct device_operations pci_ops = {
- .read_resources = pci_bus_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_bus_enable_resources,
- .init = pcie_init,
- .scan_bus = pci_scan_bridge,
- .reset_bus = pci_bus_reset,
- .ops_pci = &lops_pci,
+ .read_resources = pci_bus_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_bus_enable_resources,
+ .init = pcie_init,
+ .scan_bus = pci_scan_bridge,
+ .reset_bus = pci_bus_reset,
+ .ops_pci = &lops_pci,
};
static const struct pci_driver pci_driver __pci_driver = {
- .ops = &pci_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_PCI,
+ .ops = &pci_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_PCI,
};
@@ -315,30 +315,30 @@ struct device_operations bridge_ops = {
/* 0:15:0 PCIe PortA */
static const struct pci_driver PORTA_driver __pci_driver = {
- .ops = &bridge_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_PCIEA,
+ .ops = &bridge_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_PCIEA,
};
/* 0:15:1 PCIe PortB */
static const struct pci_driver PORTB_driver __pci_driver = {
- .ops = &bridge_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_PCIEB,
+ .ops = &bridge_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_PCIEB,
};
/* 0:15:2 PCIe PortC */
static const struct pci_driver PORTC_driver __pci_driver = {
- .ops = &bridge_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_PCIEC,
+ .ops = &bridge_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_PCIEC,
};
/* 0:15:3 PCIe PortD */
static const struct pci_driver PORTD_driver __pci_driver = {
- .ops = &bridge_ops,
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_ATI_SB900_PCIED,
+ .ops = &bridge_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_ATI_SB900_PCIED,
};
diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c
index 9a987602d3..a5c42b72c9 100644
--- a/src/southbridge/amd/cimx/sb900/reset.c
+++ b/src/southbridge/amd/cimx/sb900/reset.c
@@ -32,7 +32,7 @@ static inline void set_bios_reset(void)
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
- for(i = 0; i < nodes; i++) {
+ for (i = 0; i < nodes; i++) {
dev = NODE_PCI(i, 0);
htic = pci_read_config32(dev, HT_INIT_CONTROL);
htic &= ~HTIC_BIOSR_Detect;
diff --git a/src/southbridge/amd/cimx/sb900/smbus.c b/src/southbridge/amd/cimx/sb900/smbus.c
index 358bd48331..7d1189812a 100644
--- a/src/southbridge/amd/cimx/sb900/smbus.c
+++ b/src/southbridge/amd/cimx/sb900/smbus.c
@@ -63,7 +63,7 @@ int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_recv_byte - smbus no ready.\n");
+ printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_recv_byte - smbus no ready.\n");
return -2; /* not ready */
}
@@ -93,7 +93,7 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_send_byte - smbus no ready.\n");
+ printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_send_byte - smbus no ready.\n");
return -2; /* not ready */
}
@@ -123,7 +123,7 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_read_byte - smbus no ready.\n");
+ printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_read_byte - smbus no ready.\n");
return -2; /* not ready */
}
@@ -156,7 +156,7 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val)
u8 byte;
if (smbus_wait_until_ready(smbus_io_base) < 0) {
- printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_write_byte - smbus no ready.\n");
+ printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_write_byte - smbus no ready.\n");
return -2; /* not ready */
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-05 04:53:59 +0000