diff options
Diffstat (limited to 'src/southbridge/amd/cimx/sb900/lpc.c')
-rw-r--r-- | src/southbridge/amd/cimx/sb900/lpc.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index 5b414f41a5..ce1be11da7 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -31,8 +31,6 @@ void lpc_read_resources(device_t dev) /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); /* We got one for APIC, or one more for TRAP */ - pci_get_resource(dev, SPIROM_BASE_ADDRESS); /* SPI ROM base address */ - /* Add an extra subtractive resource for both memory and I/O. */ res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); res->base = 0; @@ -46,6 +44,9 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + /* Add a memory resource for the SPI BAR. */ + fixed_mem_resource(dev, 2, SPI_BASE_ADDRESS / 1024, 1, IORESOURCE_SUBTRACTIVE); + res = new_resource(dev, 3); res->base = IO_APIC_ADDR; res->size = 0x00001000; @@ -60,11 +61,13 @@ void lpc_set_resources(struct device *dev) struct resource *res; printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_set_resources - Start.\n"); + + /* Special case. SPI Base Address. The SpiRomEnable should STAY set. */ + res = find_resource(dev, 2); + pci_write_config32(dev, SPIROM_BASE_ADDRESS_REGISTER, res->base | SPI_ROM_ENABLE); + pci_dev_set_resources(dev); - /* Specical case. SPI Base Address. The SpiRomEnable should be set. */ - res = find_resource(dev, SPIROM_BASE_ADDRESS); - pci_write_config32(dev, SPIROM_BASE_ADDRESS, res->base | 1 << 1); printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_set_resources - End.\n"); } |