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path: root/src/southbridge/amd/cimx/sb800/late.c
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Diffstat (limited to 'src/southbridge/amd/cimx/sb800/late.c')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 8c7abdba16..c69782bc62 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -24,6 +24,7 @@
#include <arch/ioapic.h>
#include <device/smbus.h> /* smbus_bus_operations */
#include <console/console.h> /* printk */
+#include <arch/acpi.h>
#include "lpc.h" /* lpc_read_resources */
#include "SBPLATFORM.h" /* Platfrom Specific Definitions */
#include "cfg.h" /* sb800 Cimx configuration */
@@ -351,6 +352,17 @@ void sb_Late_Post(void)
AmdSbDispatcher(sb_config);
}
+void sb_Before_Pci_Restore_Init(void)
+{
+ sb_config->StdHeader.Func = SB_BEFORE_PCI_RESTORE_INIT;
+ AmdSbDispatcher(sb_config);
+}
+
+void sb_After_Pci_Restore_Init(void)
+{
+ sb_config->StdHeader.Func = SB_AFTER_PCI_RESTORE_INIT;
+ AmdSbDispatcher(sb_config);
+}
/**
* @brief SB Cimx entry point sbBeforePciInit wrapper
@@ -468,7 +480,14 @@ static void sb800_enable(device_t dev)
/* call the CIMX entry at the last sb800 device,
* so make sure the mainboard devicetree is complete
*/
+#if CONFIG_HAVE_ACPI_RESUME == 1
+ if (acpi_slp_type != 3)
+ sb_Before_Pci_Init();
+ else
+ sb_Before_Pci_Restore_Init();
+#else
sb_Before_Pci_Init();
+#endif
break;
default: