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Diffstat (limited to 'src/southbridge/amd/cimx/sb800/bootblock.c')
-rw-r--r--src/southbridge/amd/cimx/sb800/bootblock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c
index 593bd6bfc7..0a339b02f7 100644
--- a/src/southbridge/amd/cimx/sb800/bootblock.c
+++ b/src/southbridge/amd/cimx/sb800/bootblock.c
@@ -39,8 +39,8 @@ static void enable_rom(void)
pci_io_write_config32(dev, 0x44, dword);
/* SB800 LPC Bridge 0:20:3:48h.
- * BIT0: Port Enable for SuperIO 0x2E-0x2F
- * BIT1: Port Enable for SuperIO 0x4E-0x4F
+ * BIT0: Port Enable for SuperIO 0x2E-0x2F
+ * BIT1: Port Enable for SuperIO 0x4E-0x4F
* BIT4: Port Enable for LPC ROM Address Arrage2 (0x68-0x6C)
* BIT6: Port Enable for RTC IO 0x70-0x73
* BIT21: Port Enable for Port 0x80