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-rw-r--r--src/southbridge/amd/amd8111/acpi.c4
-rw-r--r--src/southbridge/amd/amd8111/acpi/sleepstates.asl2
-rw-r--r--src/southbridge/amd/amd8111/lpc.c8
3 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c
index 5216a105d6..ab48833247 100644
--- a/src/southbridge/amd/amd8111/acpi.c
+++ b/src/southbridge/amd/amd8111/acpi.c
@@ -99,7 +99,7 @@ static int lsmbus_block_write(struct device *dev, uint8_t cmd, u8 bytes,
}
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
unsigned pm_base;
#endif
@@ -171,7 +171,7 @@ static void acpi_init(struct device *dev)
(on * 12) + (on >> 1), (on & 1) * 5);
}
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
pm_base = pci_read_config16(dev, 0x58) & 0xff00;
printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
#endif
diff --git a/src/southbridge/amd/amd8111/acpi/sleepstates.asl b/src/southbridge/amd/amd8111/acpi/sleepstates.asl
index cb6c53782f..19fde4ded2 100644
--- a/src/southbridge/amd/amd8111/acpi/sleepstates.asl
+++ b/src/southbridge/amd/amd8111/acpi/sleepstates.asl
@@ -14,7 +14,7 @@
*/
/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
Name (SSFG, 0x05)
#else
Name (SSFG, 0x01)
diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c
index eab885dd49..469c9368da 100644
--- a/src/southbridge/amd/amd8111/lpc.c
+++ b/src/southbridge/amd/amd8111/lpc.c
@@ -23,7 +23,7 @@
#include <pc80/isa-dma.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <cpu/amd/powernow.h>
@@ -131,7 +131,7 @@ static void lpci_set_subsystem(struct device *dev, unsigned int vendor,
((device & 0xffff) << 16) | (vendor & 0xffff));
}
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
extern u16 pm_base;
@@ -142,7 +142,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
}
static void southbridge_acpi_fill_ssdt_generator(struct device *device) {
-#if IS_ENABLED(CONFIG_SET_FIDVID)
+#if CONFIG(SET_FIDVID)
amd_generate_powernow(pm_base + 0x10, 6, 1);
acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
#endif
@@ -160,7 +160,7 @@ static struct device_operations lpc_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
#endif