6 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/amd/agesa/hudson/acpi/fch.asl b/src/southbridge/amd/agesa/hudson/acpi/fch.asl
index 7b0232ac82..6c8e5fc6d8 100644
--- a/src/southbridge/amd/agesa/hudson/acpi/fch.asl
+++ b/src/southbridge/amd/agesa/hudson/acpi/fch.asl
@@ -62,7 +62,7 @@ Device(SDCN) {
 	Name(_ADR, 0x00140007)
 } /* end SDCN */
 
-#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
 
 /* 0:14.4 - PCI slot 1, 2, 3 */
 Device(PIBR) {
@@ -175,7 +175,7 @@ Method(_INI, 0) {
 	/* Determine the OS we're running on */
 	OSFL()
 
-#if defined(CONFIG_HUDSON_IMC_FWM) && CONFIG_HUDSON_IMC_FWM
+#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
 	#include "acpi/AmdImc.asl" /* Hudson IMC function */
 	ITZE() /* enable IMC Fan Control*/
 #endif
diff --git a/src/southbridge/amd/agesa/hudson/acpi/usb.asl b/src/southbridge/amd/agesa/hudson/acpi/usb.asl
index 0794bf3d96..d83b935ffa 100644
--- a/src/southbridge/amd/agesa/hudson/acpi/usb.asl
+++ b/src/southbridge/amd/agesa/hudson/acpi/usb.asl
@@ -50,7 +50,7 @@ Device(UOH6) {
 	Name(_PRW, Package() {0x0B, 3})
 } /* end UOH5 */
 
-#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
 /* 0:14.5 - OHCI */
 Device(UEH1) {
 	Name(_ADR, 0x00140005)
@@ -64,7 +64,7 @@ Device(XHC0) {
 	Name(_PRW, Package() {0x0B, 4})
 } /* end XHC0 */
 
-#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
 /* 0:10.1 - XHCI 1*/
 Device(XHC1) {
 	Name(_ADR, 0x00100001)
diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c
index 276ded2d19..c1d9b729ab 100644
--- a/src/southbridge/amd/agesa/hudson/fadt.c
+++ b/src/southbridge/amd/agesa/hudson/fadt.c
@@ -25,7 +25,7 @@
 #include "hudson.h"
 #include "smi.h"
 
-#if CONFIG_HUDSON_LEGACY_FREE
+#if IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE)
 	#define FADT_BOOT_ARCH ACPI_FADT_LEGACY_FREE
 #else
 	#define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042)
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 20af2e76d7..101f5d42a2 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -181,7 +181,7 @@ static void hudson_init(void *chip_info)
 
 static void hudson_final(void *chip_info)
 {
-#if !CONFIG_ACPI_ENABLE_THERMAL_ZONE
+#if !IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE)
 #if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
 	/* AMD AGESA does not enable thermal zone, so we enable it here. */
 	enable_imc_thermal_zone();
diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c
index 049eca95ff..799cc32e40 100644
--- a/src/southbridge/amd/agesa/hudson/imc.c
+++ b/src/southbridge/amd/agesa/hudson/imc.c
@@ -35,7 +35,7 @@ void imc_reg_init(void)
 	write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x03, 0xff);
 	write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x04, 0xff);
 
-#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
 	write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x10, 0x06);
 	write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x11, 0x06);
 	write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x12, 0xf7);
@@ -43,7 +43,7 @@ void imc_reg_init(void)
 	write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x14, 0xff);
 #endif
 
-#if CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
 	UINT8 PciData;
 	PCI_ADDR PciAddress;
 	AMD_CONFIG_PARAMS StdHeader;
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index 71fddc629d..46121db752 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -110,7 +110,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
 
 	readoffby1 = bytesout ? 0 : 1;
 
-#if CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
 	spi_write(0x1E, 5);
 	spi_write(0x1F, bytesout); /* SpiExtRegIndx [5] - TxByteCount */
 	spi_write(0x1E, 6);