diff options
Diffstat (limited to 'src/southbridge/amd/agesa')
-rw-r--r-- | src/southbridge/amd/agesa/hudson/hudson.h | 5 | ||||
-rw-r--r-- | src/southbridge/amd/agesa/hudson/lpc.c | 11 |
2 files changed, 9 insertions, 7 deletions
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h index 6f757eb72e..50f1738b4e 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.h +++ b/src/southbridge/amd/agesa/hudson/hudson.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2010 Advanced Micro Devices, Inc. + * Copyright (C) 2014 Sage Electronic Engineering, LLC * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -50,7 +51,9 @@ #define REV_HUDSON_A11 0x11 #define REV_HUDSON_A12 0x12 -#define SPIROM_BASE_ADDRESS_REGISTER 0xA0 +#define SPIROM_BASE_ADDRESS_REGISTER 0xA0 +#define SPI_ROM_ENABLE 0x02 +#define SPI_BASE_ADDRESS 0xFEC10000 #ifndef __SMM__ diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c index 71aaf6fe91..c8051ec42d 100644 --- a/src/southbridge/amd/agesa/hudson/lpc.c +++ b/src/southbridge/amd/agesa/hudson/lpc.c @@ -87,8 +87,6 @@ static void hudson_lpc_read_resources(device_t dev) /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); /* We got one for APIC, or one more for TRAP */ - pci_get_resource(dev, 0xA0); /* SPI ROM base address */ - /* Add an extra subtractive resource for both memory and I/O. */ res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); res->base = 0; @@ -102,6 +100,9 @@ static void hudson_lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + /* Add a memory resource for the SPI BAR. */ + fixed_mem_resource(dev, 2, SPI_BASE_ADDRESS / 1024, 1, IORESOURCE_SUBTRACTIVE); + res = new_resource(dev, 3); /* IOAPIC */ res->base = IO_APIC_ADDR; res->size = 0x00001000; @@ -115,12 +116,10 @@ static void hudson_lpc_set_resources(struct device *dev) struct resource *res; /* Special case. SPI Base Address. The SpiRomEnable should STAY set. */ - res = find_resource(dev, SPIROM_BASE_ADDRESS_REGISTER); - res->base |= PCI_COMMAND_MEMORY; + res = find_resource(dev, 2); + pci_write_config32(dev, SPIROM_BASE_ADDRESS_REGISTER, res->base | SPI_ROM_ENABLE); pci_dev_set_resources(dev); - - } /** |