3 files changed, 9 insertions, 3 deletions
diff --git a/src/soc/mediatek/common/pmif_clk.c b/src/soc/mediatek/common/pmif_clk.c
index b7f2228a76..cfd1dbce6b 100644
--- a/src/soc/mediatek/common/pmif_clk.c
+++ b/src/soc/mediatek/common/pmif_clk.c
@@ -10,13 +10,13 @@ int pmif_ulposc_check(u32 current_clk, u32 target_clk)
 	if (current_clk < (target_clk * (1000 - CAL_TOL_RATE) / 1000) ||
 	    current_clk > (target_clk * (1000 + CAL_TOL_RATE) / 1000)) {
 		printk(BIOS_WARNING,
-		       "[%s] calibration fail: cur=%d, CAL_RATE=%d, target=%dM\n",
+		       "[%s] calibration fail: cur=%dM, CAL_RATE=%d, target=%dM\n",
 		       __func__, current_clk, CAL_TOL_RATE, target_clk);
 		return -1;
 	}
 
 	printk(BIOS_DEBUG,
-	       "[%s] calibration done: cur=%d, CAL_RATE=%d, target=%dM\n",
+	       "[%s] calibration done: cur=%dM, CAL_RATE=%d, target=%dM\n",
 	       __func__, current_clk, CAL_TOL_RATE, target_clk);
 
 	return 0;
diff --git a/src/soc/mediatek/mt8188/include/soc/pmif.h b/src/soc/mediatek/mt8188/include/soc/pmif.h
index bc4f136c79..3cb8f3505f 100644
--- a/src/soc/mediatek/mt8188/include/soc/pmif.h
+++ b/src/soc/mediatek/mt8188/include/soc/pmif.h
@@ -138,5 +138,6 @@ enum {
 };
 
 #define FREQ_METER_ABIST_AD_OSC_CK	42
+#define CALI_DEFAULT_CAP_VALUE		0x3d
 
 #endif /*__MT8188_SOC_PMIF_H__*/
diff --git a/src/soc/mediatek/mt8188/pmif_clk.c b/src/soc/mediatek/mt8188/pmif_clk.c
index e292ba186a..aac9b7b696 100644
--- a/src/soc/mediatek/mt8188/pmif_clk.c
+++ b/src/soc/mediatek/mt8188/pmif_clk.c
@@ -123,8 +123,13 @@ int pmif_clk_init(void)
 {
 	u32 ulposc1;
 
-	ulposc1 = mt_fmeter_get_freq_khz(FMETER_ABIST, FREQ_METER_ABIST_AD_OSC_CK);
+	/* check hardware default value first */
+	ulposc1 = pmif_get_ulposc_freq_mhz(CALI_DEFAULT_CAP_VALUE);
 	if (pmif_ulposc_check(ulposc1, FREQ_260MHZ)) {
+		/*
+		 * If the hardware value is not what we want, we need to adjust
+		 * it by the software setting.
+		 */
 		pmif_clockmonitor_config(false);
 		if (pmif_init_ulposc())
 			return E_NODEV;