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-rw-r--r--src/soc/intel/skylake/chip_fsp20.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index ac60125f70..f9bdf8a1ef 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -28,6 +28,7 @@
#include <fsp/util.h>
#include <romstage_handoff.h>
#include <soc/acpi.h>
+#include <soc/intel/common/vbt.h>
#include <soc/interrupt.h>
#include <soc/irq.h>
#include <soc/pci_devs.h>
@@ -116,9 +117,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Load VBT */
if (is_s3_wakeup) {
printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n");
- } else if (display_init_required()) {
+ } else if (display_init_required() && IS_ENABLED(CONFIG_RUN_FSP_GOP)) {
/* Get VBT data */
- vbt_data = fsp_load_vbt();
+ vbt_data = (uintptr_t)locate_vbt();
if (vbt_data)
printk(BIOS_DEBUG, "Passing VBT to GOP\n");
else