diff options
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/alderlake/include/soc/meminit.h | 6 | ||||
-rw-r--r-- | src/soc/intel/alderlake/meminit.c | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h index 76930be0e7..5fed5680c6 100644 --- a/src/soc/intel/alderlake/include/soc/meminit.h +++ b/src/soc/intel/alderlake/include/soc/meminit.h @@ -77,6 +77,12 @@ struct mb_cfg { uint16_t rcomp_targets[5]; /* + * Dqs Pins Interleaved Setting. Enable/Disable Control + * TRUE = enable, FALSE = disable + */ + bool dq_pins_interleaved; + + /* * Early Command Training Enable/Disable Control * TRUE = enable, FALSE = disable */ diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index e7084a5a16..f5f747d79b 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -180,4 +180,5 @@ void memcfg_init(FSP_M_CONFIG *mem_cfg, mem_cfg->ECT = board_cfg->ect; mem_cfg->UserBd = board_cfg->UserBd; + mem_cfg->DqPinsInterleaved = board_cfg->dq_pins_interleaved; } |