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-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h2
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 224010c24d..97eb806682 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -219,7 +219,7 @@ void fch_init(void *chip_info);
void fch_final(void *chip_info);
void enable_aoac_devices(void);
-void sb_clk_output_48Mhz(u32 osc);
+void fch_clk_output_48Mhz(u32 osc);
void sb_read_mode(u32 mode);
void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index d9dd78fe13..5f5fc72bfc 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -204,7 +204,7 @@ static void sb_lpc_decode(void)
lpc_enable_decode(tmp);
}
-void sb_clk_output_48Mhz(u32 osc)
+void fch_clk_output_48Mhz(u32 osc)
{
u32 ctrl;