diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/psp/Kconfig | 7 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/psp_verstage/svc.c | 9 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/psp_verstage/svc.h | 4 |
3 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/psp/Kconfig b/src/soc/amd/common/block/psp/Kconfig index 84e021577a..d59e6fc4bf 100644 --- a/src/soc/amd/common/block/psp/Kconfig +++ b/src/soc/amd/common/block/psp/Kconfig @@ -48,3 +48,10 @@ config PSP_PLATFORM_SECURE_BOOT coreboot ROM is properly signed and can not be disabled once fused. Refer AMD PSB user guide doc# 56654, Revision# 1.00, this document is only available with NDA customers. + +config PSP_INCLUDES_HSP + bool + depends on SOC_AMD_COMMON_BLOCK_PSP + default n + help + Select this config to indicate SoC includes Hardware Security Processor(HSP). diff --git a/src/soc/amd/mendocino/psp_verstage/svc.c b/src/soc/amd/mendocino/psp_verstage/svc.c index e28aa3c57f..ccb60777ba 100644 --- a/src/soc/amd/mendocino/psp_verstage/svc.c +++ b/src/soc/amd/mendocino/psp_verstage/svc.c @@ -225,3 +225,12 @@ uint32_t svc_get_prev_boot_status(uint32_t *boot_status) SVC_CALL2(SVC_VERSTAGE_CMD, CMD_GET_PREV_BOOT_STATUS, (void *)¶m, retval); return retval; } + +uint32_t svc_get_hsp_secure_state(uint32_t *hsp_secure_state) +{ + uint32_t retval = 0; + struct cmd_param_get_hsp_secure_state param; + SVC_CALL2(SVC_VERSTAGE_CMD, CMD_GET_HSP_SECURE_STATE, (void *)¶m, retval); + *hsp_secure_state = param.hsp_secure_state; + return retval; +} diff --git a/src/soc/amd/mendocino/psp_verstage/svc.h b/src/soc/amd/mendocino/psp_verstage/svc.h index 0dc9fb699e..437591cef9 100644 --- a/src/soc/amd/mendocino/psp_verstage/svc.h +++ b/src/soc/amd/mendocino/psp_verstage/svc.h @@ -98,4 +98,8 @@ struct cmd_param_get_prev_boot_status { unsigned int *ptr_boot_status; }; +struct cmd_param_get_hsp_secure_state { + unsigned int hsp_secure_state; +}; + #endif /* PSP_VERSTAGE_SVC_H */ |