diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 14 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 9 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/fsp_params.c | 9 | ||||
| -rw-r--r-- | src/soc/intel/icelake/fsp_params.c | 9 | ||||
| -rw-r--r-- | src/soc/intel/jasperlake/fsp_params.c | 9 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 9 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 9 |
7 files changed, 66 insertions, 2 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index f9569f9e41..6e90cf17f8 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -574,6 +574,19 @@ static void fill_fsps_8254_params(FSP_S_CONFIG *s_cfg, s_cfg->Enable8254ClockGatingOnS3 = !use_8254; } +static void fill_fsps_pm_timer_params(FSP_S_CONFIG *s_cfg, + const struct soc_intel_alderlake_config *config) +{ + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + s_cfg->EnableTcoTimer = 1; +} + static void fill_fsps_storage_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_alderlake_config *config) { @@ -742,6 +755,7 @@ static void soc_silicon_init_params(FSP_S_CONFIG *s_cfg, fill_fsps_thc_params, fill_fsps_tbt_params, fill_fsps_8254_params, + fill_fsps_pm_timer_params, fill_fsps_storage_params, fill_fsps_pcie_params, fill_fsps_misc_power_params, diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 1ae27aefee..f22e39d442 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -437,7 +437,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Enable8254ClockGating = !use_8254; params->Enable8254ClockGatingOnS3 = !use_8254; - params->EnableTcoTimer = CONFIG(USE_PM_ACPI_TIMER); + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + params->EnableTcoTimer = 1; /* USB */ for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) { diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 2bf4a51131..f30bb1e19c 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -167,6 +167,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Enable8254ClockGating = !use_8254; params->Enable8254ClockGatingOnS3 = 1; + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + params->EnableTcoTimer = 1; + /* PCH Master Gating Control */ params->PchPostMasterClockGating = 1; params->PchPostMasterPowerGating = 1; diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index ba40f3f01d..fa63a3dfcd 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -98,6 +98,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Enable8254ClockGating = !use_8254; params->Enable8254ClockGatingOnS3 = !use_8254; + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + params->EnableTcoTimer = 1; + /* S0ix */ params->PchPmSlpS0Enable = config->s0ix_enable; diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c index 18db9359ce..085148f7b3 100644 --- a/src/soc/intel/jasperlake/fsp_params.c +++ b/src/soc/intel/jasperlake/fsp_params.c @@ -85,6 +85,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Enable8254ClockGating = !use_8254; params->Enable8254ClockGatingOnS3 = 1; + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + params->EnableTcoTimer = 1; + /* disable Legacy PME */ memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci)); diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index c99067db3d..d706e1298d 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -345,7 +345,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); params->Early8254ClockGatingEnable = !use_8254; - params->EnableTcoTimer = CONFIG(USE_PM_ACPI_TIMER); + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + params->EnableTcoTimer = 1; memcpy(params->SerialIoDevMode, config->SerialIoDevMode, sizeof(params->SerialIoDevMode)); diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 892363b75c..34ee9d8d17 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -502,6 +502,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Enable8254ClockGating = !use_8254; params->Enable8254ClockGatingOnS3 = !use_8254; + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + params->EnableTcoTimer = 1; + /* Enable Hybrid storage auto detection */ if (CONFIG(SOC_INTEL_CSE_LITE_SKU) && cse_is_hfs3_fw_sku_lite() && vboot_recovery_mode_enabled() && !cse_is_hfs1_com_normal()) { |