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-rw-r--r--src/soc/intel/apollolake/include/soc/nvs.h2
-rw-r--r--src/soc/intel/common/block/sgx/sgx.c4
-rw-r--r--src/soc/intel/skylake/include/soc/nvs.h2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index aa909a80a7..b471748653 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -28,7 +28,7 @@ struct __packed global_nvs {
uint8_t scdo; /* 0x2A - GPIO pad offset relative to the community */
uint8_t uior; /* 0x2B - UART debug controller init on S3
resume */
- uint8_t ecps; /* 0x2C - SGX Enabled status */
+ uint8_t epcs; /* 0x2C - SGX Enabled status */
uint64_t emna; /* 0x2D - 0x34 EPC base address */
uint64_t elng; /* 0x35 - 0x3C EPC Length */
uint64_t a4gb; /* 0x3D - 0x44 Base of above 4GB MMIO Resource */
diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c
index d6df99b0fa..b21e665ac8 100644
--- a/src/soc/intel/common/block/sgx/sgx.c
+++ b/src/soc/intel/common/block/sgx/sgx.c
@@ -254,12 +254,12 @@ void sgx_fill_gnvs(struct global_nvs *gnvs)
if (cpuid_regs.eax & SGX_RESOURCE_ENUM_BIT) {
/* EPC section enumerated */
- gnvs->ecps = 1;
+ gnvs->epcs = 1;
gnvs->emna = sgx_resource(cpuid_regs.eax, cpuid_regs.ebx);
gnvs->elng = sgx_resource(cpuid_regs.ecx, cpuid_regs.edx);
}
printk(BIOS_DEBUG,
"SGX: gnvs ECP status = %d base = 0x%llx len = 0x%llx\n",
- gnvs->ecps, gnvs->emna, gnvs->elng);
+ gnvs->epcs, gnvs->emna, gnvs->elng);
}
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index f4868d903f..6d5e17256c 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -41,7 +41,7 @@ struct __packed global_nvs {
u16 u2we; /* 0x3f - USB2 Wake Enable Bitmap */
u8 u3we; /* 0x41 - USB3 Wake Enable Bitmap */
u8 uior; /* 0x42 - UART debug controller init on S3 resume */
- u8 ecps; /* 0x43 - SGX Enabled status */
+ u8 epcs; /* 0x43 - SGX Enabled status */
u64 emna; /* 0x44 - 0x4B EPC base address */
u64 elng; /* 0x4C - 0x53 EPC Length */
u64 a4gb; /* 0x54 - 0x5B Base of above 4GB MMIO Resource */