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-rw-r--r--src/soc/mediatek/mt8186/include/soc/pll.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8186/include/soc/pll.h b/src/soc/mediatek/mt8186/include/soc/pll.h
index ce980774e2..c2dace3220 100644
--- a/src/soc/mediatek/mt8186/include/soc/pll.h
+++ b/src/soc/mediatek/mt8186/include/soc/pll.h
@@ -492,12 +492,12 @@ enum {
/* top_div rate */
enum {
CLK26M_HZ = 26 * MHz,
- UNIVPLL_D6_D2_HZ = UNIV2PLL_HZ / 2 / 6 / 2,
+ MAINPLL_D5_HZ = MAINPLL_HZ / 5,
};
/* top_mux rate */
enum {
- SPI_HZ = UNIVPLL_D6_D2_HZ,
+ SPI_HZ = MAINPLL_D5_HZ,
UART_HZ = CLK26M_HZ,
};