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-rw-r--r--src/soc/intel/Kconfig24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig
index 72ad3e0bd5..fb2643ba4d 100644
--- a/src/soc/intel/Kconfig
+++ b/src/soc/intel/Kconfig
@@ -13,3 +13,27 @@ source "src/soc/intel/skylake/Kconfig"
# Load common config
source "src/soc/intel/common/Kconfig"
+
+config INTEL_HAS_TOP_SWAP
+ bool
+ help
+ Set this config if the Intel SoC supports top swap feature
+
+config INTEL_ADD_TOP_SWAP_BOOTBLOCK
+ bool "Include a Top swap bootblock"
+ default n
+ depends on INTEL_HAS_TOP_SWAP
+ help
+ Intel PCH/Southbridges have feature that it is possible to have
+ the southbridge/PCH look for the bootblock at a 64K or
+ 128K/256K/512K/1MB (in case of newer SoCs) offset
+ instead of the usual top of flash.
+ Select this to put a 'second' bootblock.
+
+config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
+ hex "Size of top swap boot block"
+ depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
+ default 0x10000
+ help
+ Set this config to a supported topswap size.
+ Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000