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-rw-r--r--src/soc/intel/alderlake/romstage/romstage.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c
index d33d21f1aa..b9d08c8386 100644
--- a/src/soc/intel/alderlake/romstage/romstage.c
+++ b/src/soc/intel/alderlake/romstage/romstage.c
@@ -15,6 +15,7 @@
#include <soc/pm.h>
#include <soc/romstage.h>
#include <soc/soc_chip.h>
+#include <cpu/intel/cpu_ids.h>
#include <string.h>
#define FSP_SMBIOS_MEMORY_INFO_GUID \
@@ -23,6 +24,11 @@
0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \
}
+bool skip_cse_sub_part_update(void)
+{
+ return cpu_get_cpuid() != CPUID_ALDERLAKE_A2;
+}
+
/* Save the DIMM information for SMBIOS table 17 */
static void save_dimm_info(void)
{