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-rw-r--r--src/soc/amd/cezanne/cppc.c42
-rw-r--r--src/soc/amd/cezanne/include/soc/cppc.h1
2 files changed, 22 insertions, 21 deletions
diff --git a/src/soc/amd/cezanne/cppc.c b/src/soc/amd/cezanne/cppc.c
index 9d681c6ba7..1afa26f3e1 100644
--- a/src/soc/amd/cezanne/cppc.c
+++ b/src/soc/amd/cezanne/cppc.c
@@ -15,35 +15,35 @@ void cpu_init_cppc_config(struct cppc_config *config, u32 version)
{
config->version = version;
- config->regs[CPPC_HIGHEST_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF, 8);
- config->regs[CPPC_NOMINAL_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_NOMINAL_PERF, 8);
- config->regs[CPPC_LOWEST_NONL_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOW_NON_LIN_PERF, 8);
- config->regs[CPPC_LOWEST_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOWEST_PERF, 8);
- config->regs[CPPC_GUARANTEED_PERF] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_DESIRED_PERF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_DES_PERF, 8);
- config->regs[CPPC_MIN_PERF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MIN_PERF, 8);
- config->regs[CPPC_MAX_PERF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MAX_PERF, 8);
- config->regs[CPPC_PERF_REDUCE_TOLERANCE] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_TIME_WINDOW] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_COUNTER_WRAP] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_REF_PERF_COUNTER] = ACPI_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
- config->regs[CPPC_DELIVERED_PERF_COUNTER] = ACPI_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
- config->regs[CPPC_PERF_LIMITED] = ACPI_REG_MSR(MSR_CPPC_STATUS, 1, 1);
- config->regs[CPPC_ENABLE] = ACPI_REG_MSR(MSR_CPPC_ENABLE, 0, 1);
+ config->entries[CPPC_HIGHEST_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF, 8);
+ config->entries[CPPC_NOMINAL_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_NOMINAL_PERF, 8);
+ config->entries[CPPC_LOWEST_NONL_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOW_NON_LIN_PERF, 8);
+ config->entries[CPPC_LOWEST_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOWEST_PERF, 8);
+ config->entries[CPPC_GUARANTEED_PERF] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_DESIRED_PERF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_DES_PERF, 8);
+ config->entries[CPPC_MIN_PERF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MIN_PERF, 8);
+ config->entries[CPPC_MAX_PERF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MAX_PERF, 8);
+ config->entries[CPPC_PERF_REDUCE_TOLERANCE] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_TIME_WINDOW] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_COUNTER_WRAP] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_REF_PERF_COUNTER] = CPPC_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
+ config->entries[CPPC_DELIVERED_PERF_COUNTER] = CPPC_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
+ config->entries[CPPC_PERF_LIMITED] = CPPC_REG_MSR(MSR_CPPC_STATUS, 1, 1);
+ config->entries[CPPC_ENABLE] = CPPC_REG_MSR(MSR_CPPC_ENABLE, 0, 1);
if (version < 2)
return;
- config->regs[CPPC_AUTO_SELECT] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_AUTO_ACTIVITY_WINDOW] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_PERF_PREF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8);
- config->regs[CPPC_REF_PERF] = ACPI_REG_UNSUPPORTED;
+ config->entries[CPPC_AUTO_SELECT] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_AUTO_ACTIVITY_WINDOW] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_PERF_PREF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8);
+ config->entries[CPPC_REF_PERF] = CPPC_UNSUPPORTED;
if (version < 3)
return;
- config->regs[CPPC_LOWEST_FREQ] = ACPI_REG_UNSUPPORTED;
- config->regs[CPPC_NOMINAL_FREQ] = ACPI_REG_UNSUPPORTED;
+ config->entries[CPPC_LOWEST_FREQ] = CPPC_UNSUPPORTED;
+ config->entries[CPPC_NOMINAL_FREQ] = CPPC_UNSUPPORTED;
}
diff --git a/src/soc/amd/cezanne/include/soc/cppc.h b/src/soc/amd/cezanne/include/soc/cppc.h
index 60a5efd334..e2f4daaf49 100644
--- a/src/soc/amd/cezanne/include/soc/cppc.h
+++ b/src/soc/amd/cezanne/include/soc/cppc.h
@@ -4,6 +4,7 @@
#define _CPU_AMD_COMMON_H
#include <types.h>
+#include <acpi/acpigen.h>
struct cppc_config;
void cpu_init_cppc_config(struct cppc_config *config, u32 version);