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-rw-r--r--src/soc/intel/alderlake/chip.h7
-rw-r--r--src/soc/intel/alderlake/fsp_params.c2
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index 2dae9cd202..8ee36f63bc 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -573,6 +573,13 @@ struct soc_intel_alderlake_config {
* Default 0. Set this to 1 in order to disable C state demotion.
*/
bool disable_c1_state_auto_demotion;
+
+ /*
+ * Enable or Disable PCH USB2 Phy power gating.
+ * Default 0. Set this to 1 in order to disable PCH USB2 Phy Power gating.
+ * Workaround for Intel TA# 723158 to prevent possible display flicker.
+ */
+ bool usb2_phy_sus_pg_disable;
};
typedef struct soc_intel_alderlake_config config_t;
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 157bf351df..58f7579f7d 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -500,6 +500,8 @@ static void fill_fsps_xhci_params(FSP_S_CONFIG *s_cfg,
if (config->tcss_ports[i].enable)
s_cfg->CpuUsb3OverCurrentPin[i] = config->tcss_ports[i].ocpin;
}
+
+ s_cfg->PmcUsb2PhySusPgEnable = !config->usb2_phy_sus_pg_disable;
}
static void fill_fsps_xdci_params(FSP_S_CONFIG *s_cfg,