summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/cavium/cn81xx/clock.c4
-rw-r--r--src/soc/cavium/cn81xx/cpu.c6
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/cavium/cn81xx/clock.c b/src/soc/cavium/cn81xx/clock.c
index e415a854ab..0aafefc7e4 100644
--- a/src/soc/cavium/cn81xx/clock.c
+++ b/src/soc/cavium/cn81xx/clock.c
@@ -46,7 +46,7 @@ u64 thunderx_get_io_clock(void)
{
union cavm_rst_boot rst_boot;
- rst_boot.u = read64((void *)RST_PF_BAR0);
+ rst_boot.u = read64p(RST_PF_BAR0);
return ((u64)rst_boot.s.pnr_mul) * PLL_REF_CLK;
}
@@ -58,7 +58,7 @@ u64 thunderx_get_core_clock(void)
{
union cavm_rst_boot rst_boot;
- rst_boot.u = read64((void *)RST_PF_BAR0);
+ rst_boot.u = read64p(RST_PF_BAR0);
return ((u64)rst_boot.s.c_mul) * PLL_REF_CLK;
}
diff --git a/src/soc/cavium/cn81xx/cpu.c b/src/soc/cavium/cn81xx/cpu.c
index bb85029783..14aff58a2a 100644
--- a/src/soc/cavium/cn81xx/cpu.c
+++ b/src/soc/cavium/cn81xx/cpu.c
@@ -11,7 +11,7 @@
uint64_t cpu_get_available_core_mask(void)
{
- return read64((void *)RST_PP_AVAILABLE);
+ return read64p(RST_PP_AVAILABLE);
}
size_t cpu_get_num_available_cores(void)
@@ -75,7 +75,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
write64((void *)MIO_BOOT_AP_JUMP, (uintptr_t)secondary_init);
/* Get coremask of cores in reset */
- const uint64_t reset = read64((void *)RST_PP_RESET);
+ const uint64_t reset = read64p(RST_PP_RESET);
printk(BIOS_INFO, "CPU: Cores currently in reset: 0x%llx\n", reset);
/* Setup entry for secondary core */
@@ -93,7 +93,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
stopwatch_init_usecs_expire(&sw, 1000000);
do {
- pending = read64((void *)RST_PP_PENDING);
+ pending = read64p(RST_PP_PENDING);
} while (!stopwatch_expired(&sw) && (pending & coremask));
if (stopwatch_expired(&sw)) {