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-rw-r--r--src/soc/amd/cezanne/psp_verstage/chipset.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/chipset.c b/src/soc/amd/cezanne/psp_verstage/chipset.c
index 41d318e0eb..372fa362c3 100644
--- a/src/soc/amd/cezanne/psp_verstage/chipset.c
+++ b/src/soc/amd/cezanne/psp_verstage/chipset.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bl_uapp/bl_syscall_public.h>
+#include <console/console.h>
#include <psp_verstage.h>
uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset)
@@ -35,6 +36,8 @@ int platform_set_sha_op(enum vb2_hash_algorithm hash_alg,
void platform_report_mode(int developer_mode_enabled)
{
+ printk(BIOS_INFO, "Reporting %s mode\n",
+ developer_mode_enabled ? "Developer" : "Production");
if (developer_mode_enabled)
svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_DEVELOPER);
else