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-rw-r--r--src/soc/mediatek/common/include/soc/wdt.h3
-rw-r--r--src/soc/mediatek/common/reset.c23
-rw-r--r--src/soc/mediatek/common/wdt.c9
-rw-r--r--src/soc/mediatek/mt8173/Makefile.inc6
4 files changed, 29 insertions, 12 deletions
diff --git a/src/soc/mediatek/common/include/soc/wdt.h b/src/soc/mediatek/common/include/soc/wdt.h
index a15434c70d..b24be28e3f 100644
--- a/src/soc/mediatek/common/include/soc/wdt.h
+++ b/src/soc/mediatek/common/include/soc/wdt.h
@@ -17,6 +17,7 @@
#define SOC_MEDIATEK_COMMON_WDT_H
#include <stdint.h>
+#include <soc/addressmap.h>
struct mtk_wdt_regs {
u32 wdt_mode;
@@ -48,6 +49,8 @@ enum {
MTK_WDT_STA_HW_RST = 1 << 31
};
+static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
+
int mtk_wdt_init(void);
#endif /* SOC_MEDIATEK_COMMON_WDT_H */
diff --git a/src/soc/mediatek/common/reset.c b/src/soc/mediatek/common/reset.c
new file mode 100644
index 0000000000..855e34fb18
--- /dev/null
+++ b/src/soc/mediatek/common/reset.c
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <reset.h>
+#include <soc/wdt.h>
+
+void do_board_reset(void)
+{
+ write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
+}
diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c
index 9964c5ab72..b433c98fbe 100644
--- a/src/soc/mediatek/common/wdt.c
+++ b/src/soc/mediatek/common/wdt.c
@@ -15,13 +15,9 @@
#include <arch/io.h>
#include <console/console.h>
-#include <reset.h>
-#include <soc/addressmap.h>
#include <soc/wdt.h>
#include <vendorcode/google/chromeos/chromeos.h>
-static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
-
int mtk_wdt_init(void)
{
uint32_t wdt_sta;
@@ -56,8 +52,3 @@ int mtk_wdt_init(void)
return wdt_sta;
}
-
-void do_board_reset(void)
-{
- write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
-}
diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index b004c27d8f..4ccc218e4d 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -27,7 +27,7 @@ bootblock-y += ../common/uart.c
bootblock-y += ../common/gpio.c gpio.c gpio_init.c
bootblock-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c
-bootblock-y += ../common/wdt.c
+bootblock-y += ../common/wdt.c ../common/reset.c
bootblock-y += ../common/mmu_operations.c mmu_operations.c
################################################################################
@@ -39,7 +39,7 @@ verstage-y += ../common/uart.c
verstage-y += ../common/timer.c
verstage-y += timer.c
-verstage-y += ../common/wdt.c
+verstage-y += ../common/wdt.c ../common/reset.c
verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
verstage-y += ../common/gpio.c gpio.c
@@ -75,7 +75,7 @@ ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c i2c.c
ramstage-y += mt6311.c
ramstage-y += da9212.c
ramstage-y += ../common/gpio.c gpio.c
-ramstage-y += ../common/wdt.c
+ramstage-y += ../common/wdt.c ../common/reset.c
ramstage-y += ../common/pll.c pll.c
ramstage-y += rtc.c