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-rw-r--r--src/soc/amd/common/block/smbus/sm.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c
index 80a11848f5..1ec2730561 100644
--- a/src/soc/amd/common/block/smbus/sm.c
+++ b/src/soc/amd/common/block/smbus/sm.c
@@ -9,11 +9,6 @@
#include <arch/ioapic.h>
#include <soc/southbridge.h>
-/*
-* The southbridge enables all USB controllers by default in SMBUS Control.
-* The southbridge enables SATA by default in SMBUS Control.
-*/
-
static void sm_init(struct device *dev)
{
setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);