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-rw-r--r--src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h24
-rw-r--r--src/soc/intel/cannonlake/include/soc/pmc.h19
2 files changed, 24 insertions, 19 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
index 5176ac734a..23953142d7 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
@@ -22,18 +22,18 @@
* communities.
*/
-#define GPP_A 0
-#define GPP_B 1
-#define GPP_C 2
-#define GPP_D 3
-#define GPP_G 4
-#define GPP_K 5
-#define GPP_H 6
-#define GPP_E 7
-#define GPP_F 8
-#define GPP_I 9
-#define GPP_J 0xA
-#define GPD 0xC
+#define GPP_A 0x0
+#define GPP_B 0x1
+#define GPP_C 0x2
+#define GPP_D 0x3
+#define GPP_G 0x4
+#define GPD 0x5
+#define GPP_E 0x6
+#define GPP_F 0x7
+#define GPP_H 0x8
+#define GPP_K 0x9
+#define GPP_I 0xA
+#define GPP_J 0xB
#define GPIO_NUM_GROUPS 12
#define GPIO_MAX_NUM_PER_GROUP 24
diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h
index 67854d4cbd..e0d2614e8e 100644
--- a/src/soc/intel/cannonlake/include/soc/pmc.h
+++ b/src/soc/intel/cannonlake/include/soc/pmc.h
@@ -117,18 +117,23 @@
#define GPE0_DW_SHIFT(x) (4*(x))
#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
+/*
+ * The values for GPIO_CFG in Intel Document #572235 are incorrect.
+ * These values now match what is used by the Intel CoffeeLake FSP,
+ * please do not modify them.
+ */
#define PMC_GPP_A 0x0
#define PMC_GPP_B 0x1
#define PMC_GPP_C 0x2
#define PMC_GPP_D 0x3
-#define PMC_GPP_E 0x7
-#define PMC_GPP_F 0x8
+#define PMC_GPP_E 0xA
+#define PMC_GPP_F 0xB
#define PMC_GPP_G 0x4
-#define PMC_GPP_H 0x6
-#define PMC_GPP_I 0x9
-#define PMC_GPP_J 0xA
-#define PMC_GPP_K 0x5
-#define PMC_GPD 0xC
+#define PMC_GPP_H 0x9
+#define PMC_GPP_I 0xC
+#define PMC_GPP_J 0xD
+#define PMC_GPP_K 0x8
+#define PMC_GPD 0x7
#else
#define PMC_GPP_A 0x0
#define PMC_GPP_B 0x1