diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/Kconfig.common | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/hda_verb.c | 35 |
2 files changed, 5 insertions, 31 deletions
diff --git a/src/soc/intel/common/Kconfig.common b/src/soc/intel/common/Kconfig.common index ba0b2db32f..1a59d04087 100644 --- a/src/soc/intel/common/Kconfig.common +++ b/src/soc/intel/common/Kconfig.common @@ -1,5 +1,6 @@ config SOC_INTEL_COMMON bool + select AZALIA_PLUGIN_SUPPORT select HAVE_DISPLAY_MTRRS help common code for Intel SOCs diff --git a/src/soc/intel/common/hda_verb.c b/src/soc/intel/common/hda_verb.c index 83bbb59588..57104c494e 100644 --- a/src/soc/intel/common/hda_verb.c +++ b/src/soc/intel/common/hda_verb.c @@ -7,39 +7,12 @@ #include "hda_verb.h" -static int set_bits(void *port, u32 mask, u32 val) -{ - u32 reg32; - int count; - - /* Write (val & mask) to port */ - val &= mask; - reg32 = read32(port); - reg32 &= ~mask; - reg32 |= val; - write32(port, reg32); - - /* Wait for readback of register to match what was just written to it */ - count = 50; - do { - /* Wait 1ms based on BKDG wait time */ - mdelay(1); - reg32 = read32(port); - reg32 &= mask; - } while ((reg32 != val) && --count); - - /* Timeout occurred */ - if (!count) - return -1; - return 0; -} - int hda_codec_detect(u8 *base) { u8 reg8; /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) + if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec; /* Write back the value once reset bit is set. */ @@ -51,11 +24,11 @@ int hda_codec_detect(u8 *base) write8(base + HDA_STATESTS_REG, 0xf); /* Turn off the link and poll RESET# bit until it reads back as 0 */ - if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, ~HDA_GCTL_CRST) < 0) + if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, ~HDA_GCTL_CRST) < 0) goto no_codec; /* Turn on the link and poll RESET# bit until it reads back as 1 */ - if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) + if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec; /* Read in Codec location (BAR + 0xe)[2..0]*/ @@ -69,7 +42,7 @@ int hda_codec_detect(u8 *base) no_codec: /* Codec Not found */ /* Put HDA back in reset (BAR + 0x8) [0] */ - set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0); + azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0); printk(BIOS_DEBUG, "HDA: No codec!\n"); return 0; } |