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-rw-r--r--src/soc/intel/broadwell/lpc.c3
-rw-r--r--src/soc/intel/skylake/pmc.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index c77995d652..7e57b23504 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -47,6 +47,7 @@
#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/chromeos.h>
+#include <vendorcode/google/chromeos/vbnv_layout.h>
#endif
static void pch_enable_ioapic(struct device *dev)
@@ -181,7 +182,7 @@ static void pch_power_options(device_t dev)
*/
static void pch_cmos_init_preserve(int reset)
{
- uint8_t vbnv[CONFIG_VBNV_SIZE];
+ uint8_t vbnv[VBNV_BLOCK_SIZE];
if (reset)
read_vbnv(vbnv);
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index a2d88aa8a4..eb7a16036d 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -37,6 +37,7 @@
#include <soc/ramstage.h>
#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/chromeos.h>
+#include <vendorcode/google/chromeos/vbnv_layout.h>
#endif
static const struct reg_script pch_pmc_misc_init_script[] = {
@@ -114,7 +115,7 @@ static void pch_set_acpi_mode(void)
*/
static void pch_cmos_init_preserve(int reset)
{
- uint8_t vbnv[CONFIG_VBNV_SIZE];
+ uint8_t vbnv[VBNV_BLOCK_SIZE];
if (reset)
read_vbnv(vbnv);