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-rw-r--r--src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
index 2fdc38f320..18a86e6106 100644
--- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
+++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
@@ -36,11 +36,9 @@ SECTIONS
PRERAM_CBFS_CACHE(0x40002000, 72K)
VBOOT2_WORK(0x40014000, 16K)
STACK(0x40018000, 2K)
- BOOTBLOCK(0x40019000, 20K)
- VERSTAGE(0x4001E000, 60K)
- BOOTBLOCK(0x40019000, 22K)
- VERSTAGE(0x4001E800, 58K)
- ROMSTAGE(0x4002D000, 76K)
+ BOOTBLOCK(0x40019000, 24K)
+ VERSTAGE(0x4001f000, 60K)
+ ROMSTAGE(0x4002e000, 72K)
SRAM_END(0x40040000)
DRAM_START(0x80000000)