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-rw-r--r--src/soc/intel/denverton_ns/bootblock/uart.c4
-rw-r--r--src/soc/intel/denverton_ns/include/soc/fiamux.h6
-rw-r--r--src/soc/intel/denverton_ns/include/soc/uart.h2
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/denverton_ns/bootblock/uart.c b/src/soc/intel/denverton_ns/bootblock/uart.c
index bad16de6b7..a81b389d99 100644
--- a/src/soc/intel/denverton_ns/bootblock/uart.c
+++ b/src/soc/intel/denverton_ns/bootblock/uart.c
@@ -186,12 +186,12 @@ void early_uart_init(void)
register int i;
/* Check: do we have enought elements to init. ? */
- BUILD_BUG_ON(HARCUVAR_UARTS_TO_INI > ELEM_OF_UART_TAB);
+ BUILD_BUG_ON(DENVERTON_UARTS_TO_INI > ELEM_OF_UART_TAB);
/* HSUART(B0:D26:0-1) GPIO init. */
early_config_gpio();
- for (i = HARCUVAR_UARTS_TO_INI - 1; i >= 0; --i) {
+ for (i = DENVERTON_UARTS_TO_INI - 1; i >= 0; --i) {
pci_early_hsuart_device_probe(0, CONFIG_HSUART_DEV, i,
legacy_uart_ioadr_tab[i]);
}
diff --git a/src/soc/intel/denverton_ns/include/soc/fiamux.h b/src/soc/intel/denverton_ns/include/soc/fiamux.h
index 3fd9321e07..5f65f53a83 100644
--- a/src/soc/intel/denverton_ns/include/soc/fiamux.h
+++ b/src/soc/intel/denverton_ns/include/soc/fiamux.h
@@ -14,8 +14,8 @@
* GNU General Public License for more details.
*/
-#ifndef _MAINBOARD_HARCUVAR_FIAMUX_H
-#define _MAINBOARD_HARCUVAR_FIAMUX_H
+#ifndef _DENVERTON_NS_FIAMUX_H
+#define _DENVERTON_NS_FIAMUX_H
#include <fsp/util.h>
@@ -27,4 +27,4 @@ void print_fiamux_config_hob(BL_FIA_MUX_CONFIG_HOB *fiamux_hob_data);
size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config);
-#endif // _MAINBOARD_HARCUVAR_FIAMUX_H
+#endif // _DENVERTON_NS_FIAMUX_H
diff --git a/src/soc/intel/denverton_ns/include/soc/uart.h b/src/soc/intel/denverton_ns/include/soc/uart.h
index 29e9024d87..662d3e9727 100644
--- a/src/soc/intel/denverton_ns/include/soc/uart.h
+++ b/src/soc/intel/denverton_ns/include/soc/uart.h
@@ -18,7 +18,7 @@
#define _DENVERTON_NS_UART_H
#define SIZE_OF_HSUART_RES 0x100
-#define HARCUVAR_UARTS_TO_INI 3
+#define DENVERTON_UARTS_TO_INI 3
#define PSR_OFFSET 0x30
#define PCI_FUNC_RDCFG_HIDE 0x74