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-rw-r--r--src/soc/intel/apollolake/cpu.c6
-rw-r--r--src/soc/intel/apollolake/include/soc/cpu.h3
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index e2d3a9dae7..916d7c5cf4 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -43,6 +43,12 @@ static const struct reg_script core_msr_script[] = {
REG_MSR_RMW(MSR_POWER_CTL, ~0x2, 0),
/* Disable support for MONITOR and MWAIT instructions */
REG_MSR_RMW(MSR_IA32_MISC_ENABLES, ~MONITOR_MWAIT_DIS_MASK, 0),
+ /*
+ * Enable and Lock the Advanced Encryption Standard (AES-NI)
+ * feature register
+ */
+ REG_MSR_RMW(MSR_FEATURE_CONFIG, ~FEATURE_CONFIG_RESERVED_MASK,
+ FEATURE_CONFIG_LOCK),
REG_SCRIPT_END
};
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h
index 66fc29babc..38ce4ff913 100644
--- a/src/soc/intel/apollolake/include/soc/cpu.h
+++ b/src/soc/intel/apollolake/include/soc/cpu.h
@@ -66,6 +66,9 @@ void set_max_freq(void);
#define MSR_PMG_CST_CONFIG_CONTROL 0xe2
#define MSR_PMG_IO_CAPTURE_BASE 0xe4
+#define MSR_FEATURE_CONFIG 0x13c
+#define FEATURE_CONFIG_RESERVED_MASK 0x3ULL
+#define FEATURE_CONFIG_LOCK (1 << 0)
#define MSR_POWER_CTL 0x1fc
#define MSR_L2_QOS_MASK(reg) (0xd10 + reg)