diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/cache_as_ram.inc | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/src/soc/intel/baytrail/romstage/cache_as_ram.inc b/src/soc/intel/baytrail/romstage/cache_as_ram.inc index 945b56d160..8602237d28 100644 --- a/src/soc/intel/baytrail/romstage/cache_as_ram.inc +++ b/src/soc/intel/baytrail/romstage/cache_as_ram.inc @@ -36,9 +36,6 @@ #define NoEvictMod_MSR 0x2e0 #define BBL_CR_CTL3_MSR 0x11e - /* Save the BIST result. */ - movl %eax, %ebp - cache_as_ram: post_code(0x20) @@ -183,14 +180,13 @@ addrsize_set_high: movl %eax, %esp /* Push the initial TSC value from boot block. The low 32 bits are - * in mm0, and the high 32 bits are in mm1. */ - movd %mm1, %eax + * in mm1, and the high 32 bits are in mm2. */ + movd %mm2, %eax pushl %eax - movd %mm0, %eax + movd %mm1, %eax pushl %eax /* Restore the BIST result. */ - movl %ebp, %eax - movl %esp, %ebp + movd %mm0, %eax pushl %eax before_romstage: |