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-rw-r--r--src/soc/broadcom/cygnus/spi.c87
-rw-r--r--src/soc/imgtec/pistachio/spi.c105
-rw-r--r--src/soc/intel/apollolake/spi.c19
-rw-r--r--src/soc/intel/baytrail/spi.c34
-rw-r--r--src/soc/intel/braswell/spi.c34
-rw-r--r--src/soc/intel/broadwell/spi.c34
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c34
-rw-r--r--src/soc/intel/fsp_broadwell_de/spi.c34
-rw-r--r--src/soc/intel/skylake/flash_controller.c19
-rw-r--r--src/soc/marvell/armada38x/spi.c37
-rw-r--r--src/soc/marvell/bg4cd/spi.c15
-rw-r--r--src/soc/mediatek/mt8173/spi.c60
-rw-r--r--src/soc/nvidia/tegra124/spi.c15
-rw-r--r--src/soc/nvidia/tegra210/spi.c15
-rw-r--r--src/soc/qualcomm/ipq40xx/spi.c93
-rw-r--r--src/soc/qualcomm/ipq806x/spi.c101
-rw-r--r--src/soc/rockchip/common/spi.c35
-rw-r--r--src/soc/samsung/exynos5420/spi.c45
18 files changed, 404 insertions, 412 deletions
diff --git a/src/soc/broadcom/cygnus/spi.c b/src/soc/broadcom/cygnus/spi.c
index 810f2c266c..e597efced9 100644
--- a/src/soc/broadcom/cygnus/spi.c
+++ b/src/soc/broadcom/cygnus/spi.c
@@ -96,42 +96,6 @@ static struct qspi_priv *to_qspi_slave(const struct spi_slave *slave)
return &qspi_slave;
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- struct qspi_priv *priv = &qspi_slave;
- unsigned int spbr;
-
- slave->bus = bus;
- slave->cs = cs;
-
- priv->max_hz = QSPI_MAX_HZ;
- priv->spi_mode = QSPI_MODE;
- priv->reg = (void *)(IPROC_QSPI_BASE);
- priv->mspi_enabled = 0;
- priv->bus_claimed = 0;
-
- /* MSPI: Basic hardware initialization */
- REG_WR(priv->reg + MSPI_SPCR1_LSB_REG, 0);
- REG_WR(priv->reg + MSPI_SPCR1_MSB_REG, 0);
- REG_WR(priv->reg + MSPI_NEWQP_REG, 0);
- REG_WR(priv->reg + MSPI_ENDQP_REG, 0);
- REG_WR(priv->reg + MSPI_SPCR2_REG, 0);
-
- /* MSPI: SCK configuration */
- spbr = (IPROC_QSPI_CLK - 1) / (2 * priv->max_hz) + 1;
- REG_WR(priv->reg + MSPI_SPCR0_LSB_REG,
- MAX(MIN(spbr, SPBR_MAX), SPBR_MIN));
-
- /* MSPI: Mode configuration (8 bits by default) */
- priv->mspi_16bit = 0;
- REG_WR(priv->reg + MSPI_SPCR0_MSB_REG,
- 0x80 | /* Master */
- (8 << 2) | /* 8 bits per word */
- (priv->spi_mode & 3)); /* mode: CPOL / CPHA */
-
- return 0;
-}
-
static int mspi_enable(struct qspi_priv *priv)
{
struct stopwatch sw;
@@ -156,7 +120,7 @@ static int mspi_enable(struct qspi_priv *priv)
return 0;
}
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct qspi_priv *priv = to_qspi_slave(slave);
@@ -175,7 +139,7 @@ int spi_claim_bus(const struct spi_slave *slave)
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct qspi_priv *priv = to_qspi_slave(slave);
@@ -189,8 +153,8 @@ void spi_release_bus(const struct spi_slave *slave)
#define RXRAM_8B(p, i) (REG_RD((p)->reg + MSPI_RXRAM_REG + \
((((i) << 1) + 1) << 2)) & 0xff)
-int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
- void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
struct qspi_priv *priv = to_qspi_slave(slave);
const u8 *tx = (const u8 *)dout;
@@ -311,6 +275,49 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
return 0;
}
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ struct qspi_priv *priv = &qspi_slave;
+ unsigned int spbr;
+
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+
+ priv->max_hz = QSPI_MAX_HZ;
+ priv->spi_mode = QSPI_MODE;
+ priv->reg = (void *)(IPROC_QSPI_BASE);
+ priv->mspi_enabled = 0;
+ priv->bus_claimed = 0;
+
+ /* MSPI: Basic hardware initialization */
+ REG_WR(priv->reg + MSPI_SPCR1_LSB_REG, 0);
+ REG_WR(priv->reg + MSPI_SPCR1_MSB_REG, 0);
+ REG_WR(priv->reg + MSPI_NEWQP_REG, 0);
+ REG_WR(priv->reg + MSPI_ENDQP_REG, 0);
+ REG_WR(priv->reg + MSPI_SPCR2_REG, 0);
+
+ /* MSPI: SCK configuration */
+ spbr = (IPROC_QSPI_CLK - 1) / (2 * priv->max_hz) + 1;
+ REG_WR(priv->reg + MSPI_SPCR0_LSB_REG,
+ MAX(MIN(spbr, SPBR_MAX), SPBR_MIN));
+
+ /* MSPI: Mode configuration (8 bits by default) */
+ priv->mspi_16bit = 0;
+ REG_WR(priv->reg + MSPI_SPCR0_MSB_REG,
+ 0x80 | /* Master */
+ (8 << 2) | /* 8 bits per word */
+ (priv->spi_mode & 3)); /* mode: CPOL / CPHA */
+
+ return 0;
+}
+
unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
{
return min(65535, buf_len);
diff --git a/src/soc/imgtec/pistachio/spi.c b/src/soc/imgtec/pistachio/spi.c
index 86c452a55a..e956e46f7a 100644
--- a/src/soc/imgtec/pistachio/spi.c
+++ b/src/soc/imgtec/pistachio/spi.c
@@ -421,53 +421,8 @@ void spi_init(void)
memset(img_spi_slaves, 0, sizeof(img_spi_slaves));
}
-/* Set up communications parameters for a SPI slave. */
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- struct img_spi_slave *img_slave = NULL;
- struct spim_device_parameters *device_parameters;
- u32 base;
-
- switch (bus) {
- case 0:
- base = IMG_SPIM0_BASE_ADDRESS;
- break;
- case 1:
- base = IMG_SPIM1_BASE_ADDRESS;
- break;
- default:
- printk(BIOS_ERR, "%s: Error: unsupported bus.\n",
- __func__);
- return -1;
- }
- if (cs > SPIM_DEVICE4) {
- printk(BIOS_ERR, "%s: Error: unsupported chipselect.\n",
- __func__);
- return -1;
- }
-
- slave->bus = bus;
- slave->cs = cs;
-
- img_slave = get_img_slave(slave);
- device_parameters = &(img_slave->device_parameters);
-
- img_slave->base = base;
-
- device_parameters->bitrate = 64;
- device_parameters->cs_setup = 0;
- device_parameters->cs_hold = 0;
- device_parameters->cs_delay = 0;
- device_parameters->spi_mode = SPIM_MODE_0;
- device_parameters->cs_idle_level = 1;
- device_parameters->data_idle_level = 0;
- img_slave->initialised = IMG_FALSE;
-
- return 0;
-}
-
/* Claim the bus and prepare it for communication */
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
int ret;
struct img_spi_slave *img_slave;
@@ -498,7 +453,7 @@ int spi_claim_bus(const struct spi_slave *slave)
}
/* Release the SPI bus */
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct img_spi_slave *img_slave;
@@ -540,8 +495,8 @@ static int do_spi_xfer(const struct spi_slave *slave, const void *dout,
return spim_io(slave, &buff_0, (dout && din) ? &buff_1 : NULL);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
- void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
unsigned int in_sz, out_sz;
int ret;
@@ -582,6 +537,58 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
return SPIM_OK;
}
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+/* Set up communications parameters for a SPI slave. */
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ struct img_spi_slave *img_slave = NULL;
+ struct spim_device_parameters *device_parameters;
+ u32 base;
+
+ switch (bus) {
+ case 0:
+ base = IMG_SPIM0_BASE_ADDRESS;
+ break;
+ case 1:
+ base = IMG_SPIM1_BASE_ADDRESS;
+ break;
+ default:
+ printk(BIOS_ERR, "%s: Error: unsupported bus.\n",
+ __func__);
+ return -1;
+ }
+ if (cs > SPIM_DEVICE4) {
+ printk(BIOS_ERR, "%s: Error: unsupported chipselect.\n",
+ __func__);
+ return -1;
+ }
+
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+
+ img_slave = get_img_slave(slave);
+ device_parameters = &(img_slave->device_parameters);
+
+ img_slave->base = base;
+
+ device_parameters->bitrate = 64;
+ device_parameters->cs_setup = 0;
+ device_parameters->cs_hold = 0;
+ device_parameters->cs_delay = 0;
+ device_parameters->spi_mode = SPIM_MODE_0;
+ device_parameters->cs_idle_level = 1;
+ device_parameters->data_idle_level = 0;
+ img_slave->initialised = IMG_FALSE;
+
+ return 0;
+}
+
unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
{
return min(IMGTEC_SPI_MAX_TRANSFER_SIZE, buf_len);
diff --git a/src/soc/intel/apollolake/spi.c b/src/soc/intel/apollolake/spi.c
index ca56702dcf..8992fa55ca 100644
--- a/src/soc/intel/apollolake/spi.c
+++ b/src/soc/intel/apollolake/spi.c
@@ -184,13 +184,6 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return MIN(buf_len, SPIBAR_FDATA_FIFO_SIZE);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
-{
- printk(BIOS_DEBUG, "NOT IMPLEMENTED: %s() !!!\n", __func__);
- return E_NOT_IMPLEMENTED;
-}
-
/*
* Write-protection status for BIOS region (BIOS_CONTROL register):
* EISS/WPD bits 00 01 10 11
@@ -215,17 +208,6 @@ void spi_init(void)
pci_write_config32(ctx->pci_dev, SPIBAR_BIOS_CONTROL, bios_ctl);
}
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* There's nothing we need to to here. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* No magic needed here. */
-}
-
static int nuclear_spi_erase(const struct spi_flash *flash, uint32_t offset,
size_t len)
{
@@ -400,6 +382,7 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
slave->bus = bus;
slave->cs = cs;
+ slave->ctrlr = NULL;
return 0;
}
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index b4f95aa832..0f7b0c6ced 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -260,13 +260,6 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- return 0;
-}
-
static ich9_spi_regs *spi_regs(void)
{
device_t dev;
@@ -308,17 +301,6 @@ static void spi_init_cb(void *unused)
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;
@@ -480,8 +462,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(cntlr.databytes, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
uint16_t control;
int16_t opcode_index;
@@ -627,3 +609,15 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ return 0;
+}
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index 4236e6ff50..2a0ddf8179 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -229,13 +229,6 @@ static void read_reg(void *src, void *value, uint32_t size)
}
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- return 0;
-}
-
static ich9_spi_regs *spi_regs(void)
{
device_t dev;
@@ -287,17 +280,6 @@ static void spi_init_cb(void *unused)
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;
@@ -461,8 +443,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(cntlr.databytes, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
uint16_t control;
int16_t opcode_index;
@@ -611,3 +593,15 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ return 0;
+}
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index 5220970532..d2ae94314d 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -259,13 +259,6 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- return 0;
-}
-
void spi_init(void)
{
uint8_t *rcrb; /* Root Complex Register Block */
@@ -304,17 +297,6 @@ static void spi_init_cb(void *unused)
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;
@@ -476,8 +458,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(cntlr.databytes, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
uint16_t control;
int16_t opcode_index;
@@ -661,3 +643,15 @@ int spi_flash_protect(u32 start, u32 size)
__func__, prr, start, end);
return 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ return 0;
+}
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 06b160c8b5..997bd138ae 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -249,13 +249,6 @@ static void read_reg(const void *src, void *value, uint32_t size)
}
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- return 0;
-}
-
static ich9_spi_regs *spi_regs(void)
{
device_t dev;
@@ -288,17 +281,6 @@ void spi_init(void)
cntlr.preop = &ich9_spi->preop;
}
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;
@@ -460,8 +442,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(cntlr.databytes, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
uint16_t control;
int16_t opcode_index;
@@ -607,3 +589,15 @@ spi_xfer_exit:
return 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ return 0;
+}
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index 8af56860fa..5848966f38 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -259,13 +259,6 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave * slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- return 0;
-}
-
void spi_init(void)
{
uint8_t *rcrb; /* Root Complex Register Block */
@@ -303,17 +296,6 @@ void spi_init(void)
pci_write_config_byte(dev, 0xdc, bios_cntl | 0x1);
}
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;
@@ -475,8 +457,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(cntlr.databytes, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytesout, void *din, size_t bytesin)
{
uint16_t control;
int16_t opcode_index;
@@ -624,3 +606,15 @@ spi_xfer_exit:
return 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ return 0;
+}
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c
index 734d9d3532..e0ac93da03 100644
--- a/src/soc/intel/skylake/flash_controller.c
+++ b/src/soc/intel/skylake/flash_controller.c
@@ -151,13 +151,6 @@ static size_t spi_get_flash_size(pch_spi_regs *spi_bar)
return size;
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
-{
- /* TODO: Define xfer for hardware sequencing. */
- return -1;
-}
-
void spi_init(void)
{
uint8_t bios_cntl;
@@ -170,17 +163,6 @@ void spi_init(void)
pci_write_config_byte(dev, SPIBAR_BIOS_CNTL, bios_cntl);
}
-int spi_claim_bus(const struct spi_slave *slave)
-{
- /* Handled by PCH automatically. */
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
- /* Handled by PCH automatically. */
-}
-
int pch_hwseq_erase(const struct spi_flash *flash, u32 offset, size_t len)
{
u32 start, end, erase_size;
@@ -377,6 +359,7 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
slave->bus = bus;
slave->cs = cs;
+ slave->ctrlr = NULL;
return 0;
}
diff --git a/src/soc/marvell/armada38x/spi.c b/src/soc/marvell/armada38x/spi.c
index 8f9686793f..25480e49ff 100644
--- a/src/soc/marvell/armada38x/spi.c
+++ b/src/soc/marvell/armada38x/spi.c
@@ -442,22 +442,14 @@ static int mrvl_spi_xfer(const struct spi_slave *slave,
return 0;
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- mv_spi_sys_init(bus, cs, CONFIG_SF_DEFAULT_SPEED);
- return 0;
-}
-
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
mv_spi_cs_set(slave->bus, slave->cs);
mv_spi_cs_assert(slave->bus);
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
mv_spi_cs_deassert(slave->bus);
}
@@ -467,11 +459,11 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return buf_len;
}
-int spi_xfer(const struct spi_slave *slave,
- const void *dout,
- size_t out_bytes,
- void *din,
- size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave,
+ const void *dout,
+ size_t out_bytes,
+ void *din,
+ size_t in_bytes)
{
int ret = -1;
@@ -483,3 +475,18 @@ int spi_xfer(const struct spi_slave *slave,
die("Unexpected condition in spi_xfer\n");
return ret;
}
+
+static const spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ mv_spi_sys_init(bus, cs, CONFIG_SF_DEFAULT_SPEED);
+ return 0;
+}
diff --git a/src/soc/marvell/bg4cd/spi.c b/src/soc/marvell/bg4cd/spi.c
index 54161bcf33..188a6bd483 100644
--- a/src/soc/marvell/bg4cd/spi.c
+++ b/src/soc/marvell/bg4cd/spi.c
@@ -19,18 +19,3 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
return -1;
}
-
-int spi_claim_bus(const struct spi_slave *slave)
-{
- return 0;
-}
-
-void spi_release_bus(const struct spi_slave *slave)
-{
-}
-
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
-{
- return 0;
-}
diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c
index d6bcc0bd0a..53d5b8ce15 100644
--- a/src/soc/mediatek/mt8173/spi.c
+++ b/src/soc/mediatek/mt8173/spi.c
@@ -160,29 +160,7 @@ static void mtk_spi_dump_data(const char *name, const uint8_t *data,
#endif
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- struct mtk_spi_bus *eslave;
-
- switch (bus) {
- case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS:
- slave->bus = bus;
- slave->cs = cs;
- eslave = to_mtk_spi(slave);
- assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
- spi_sw_reset(eslave->regs);
- return 0;
- case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS:
- slave->bus = bus;
- slave->cs = cs;
- return 0;
- default:
- die ("wrong bus number.\n");
- };
- return -1;
-}
-
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct mtk_spi_bus *mtk_slave = to_mtk_spi(slave);
struct mtk_spi_regs *regs = mtk_slave->regs;
@@ -269,8 +247,8 @@ error:
return -1;
}
-int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
- void *din, size_t bytes_in)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytes_out, void *din, size_t bytes_in)
{
size_t min_size = 0;
int ret;
@@ -301,7 +279,7 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct mtk_spi_bus *mtk_slave = to_mtk_spi(slave);
struct mtk_spi_regs *regs = mtk_slave->regs;
@@ -310,3 +288,33 @@ void spi_release_bus(const struct spi_slave *slave)
spi_sw_reset(regs);
mtk_slave->state = MTK_SPI_IDLE;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ struct mtk_spi_bus *eslave;
+
+ slave->ctrlr = &spi_ctrlr;
+
+ switch (bus) {
+ case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS:
+ slave->bus = bus;
+ slave->cs = cs;
+ eslave = to_mtk_spi(slave);
+ assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
+ spi_sw_reset(eslave->regs);
+ return 0;
+ case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS:
+ slave->bus = bus;
+ slave->cs = cs;
+ return 0;
+ default:
+ die ("wrong bus number.\n");
+ };
+ return -1;
+}
diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c
index 0cb48657d6..5d8084fbdf 100644
--- a/src/soc/nvidia/tegra124/spi.c
+++ b/src/soc/nvidia/tegra124/spi.c
@@ -209,7 +209,7 @@ static unsigned int tegra_spi_speed(unsigned int bus)
return 50000000;
}
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct tegra_spi_regs *regs = to_tegra_spi(slave->bus)->regs;
u32 val;
@@ -232,7 +232,7 @@ int spi_claim_bus(const struct spi_slave *slave)
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct tegra_spi_regs *regs = to_tegra_spi(slave->bus)->regs;
u32 val;
@@ -719,8 +719,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return buf_len;
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t out_bytes, void *din, size_t in_bytes)
{
struct tegra_spi_channel *spi = to_tegra_spi(slave->bus);
u8 *out_buf = (u8 *)dout;
@@ -798,6 +798,12 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
return ret;
}
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct tegra_spi_channel *channel = to_tegra_spi(bus);
@@ -806,6 +812,7 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
slave->bus = channel->slave.bus;
slave->cs = channel->slave.cs;
+ slave->ctrlr = &spi_ctrlr;
return 0;
}
diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c
index 3a2dd17230..292135542a 100644
--- a/src/soc/nvidia/tegra210/spi.c
+++ b/src/soc/nvidia/tegra210/spi.c
@@ -208,7 +208,7 @@ static struct tegra_spi_channel * const to_tegra_spi(int bus) {
return &tegra_spi_channels[bus - 1];
}
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct tegra_spi_regs *regs = to_tegra_spi(slave->bus)->regs;
u32 val;
@@ -231,7 +231,7 @@ int spi_claim_bus(const struct spi_slave *slave)
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct tegra_spi_regs *regs = to_tegra_spi(slave->bus)->regs;
u32 val;
@@ -755,8 +755,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return buf_len;
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t out_bytes, void *din, size_t in_bytes)
{
struct tegra_spi_channel *spi = to_tegra_spi(slave->bus);
u8 *out_buf = (u8 *)dout;
@@ -834,6 +834,12 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
return ret;
}
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct tegra_spi_channel *channel = to_tegra_spi(bus);
@@ -842,6 +848,7 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
slave->cs = channel->slave.cs;
slave->bus = channel->slave.bus;
+ slave->ctrlr = &spi_ctrlr;
return 0;
}
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c
index cda3bea7e6..6d044b32f2 100644
--- a/src/soc/qualcomm/ipq40xx/spi.c
+++ b/src/soc/qualcomm/ipq40xx/spi.c
@@ -226,45 +226,6 @@ static struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
return NULL;
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- struct ipq_spi_slave *ds = NULL;
- int i;
-
- if ((bus < BLSP0_SPI) || (bus > BLSP1_SPI)
- || ((bus == BLSP0_SPI) && (cs > 2))
- || ((bus == BLSP1_SPI) && (cs > 0))) {
- printk(BIOS_ERR,
- "SPI error: unsupported bus %d (Supported busses 0, 1 and 2) "
- "or chipselect\n", bus);
- return -1;
- }
-
- for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
- if (spi_slave_pool[i].allocated)
- continue;
- ds = spi_slave_pool + i;
-
- ds->slave.bus = slave->bus = bus;
- ds->slave.cs = slave->cs = cs;
- ds->regs = &spi_reg[bus];
-
- /*
- * TODO(vbendeb):
- * hardcoded frequency and mode - we might need to find a way
- * to configure this
- */
- ds->freq = 10000000;
- ds->mode = SPI_MODE3;
- ds->allocated = 1;
-
- return 0;
- }
-
- printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
- return -1;
-}
-
/*
* BLSP QUPn SPI Hardware Initialisation
*/
@@ -340,7 +301,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds)
return SUCCESS;
}
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct ipq_spi_slave *ds = to_ipq_spi(slave);
unsigned int ret;
@@ -352,7 +313,7 @@ int spi_claim_bus(const struct spi_slave *slave)
return SUCCESS;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct ipq_spi_slave *ds = to_ipq_spi(slave);
@@ -653,8 +614,8 @@ static int blsp_spi_write(struct ipq_spi_slave *ds, u8 *cmd_buffer,
* This function is invoked with either tx_buf or rx_buf.
* Calling this function with both null does a chip select change.
*/
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t out_bytes, void *din, size_t in_bytes)
{
struct ipq_spi_slave *ds = to_ipq_spi(slave);
u8 *txp = (u8 *)dout;
@@ -690,3 +651,49 @@ out:
return ret;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ struct ipq_spi_slave *ds = NULL;
+ int i;
+
+ if ((bus < BLSP0_SPI) || (bus > BLSP1_SPI)
+ || ((bus == BLSP0_SPI) && (cs > 2))
+ || ((bus == BLSP1_SPI) && (cs > 0))) {
+ printk(BIOS_ERR,
+ "SPI error: unsupported bus %d (Supported busses 0, 1 and 2) "
+ "or chipselect\n", bus);
+ return -1;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
+ if (spi_slave_pool[i].allocated)
+ continue;
+ ds = spi_slave_pool + i;
+
+ ds->slave.bus = slave->bus = bus;
+ ds->slave.cs = slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ ds->regs = &spi_reg[bus];
+
+ /*
+ * TODO(vbendeb):
+ * hardcoded frequency and mode - we might need to find a way
+ * to configure this
+ */
+ ds->freq = 10000000;
+ ds->mode = SPI_MODE3;
+ ds->allocated = 1;
+
+ return 0;
+ }
+
+ printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
+ return -1;
+}
diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c
index 81dc508cd7..e907729a13 100644
--- a/src/soc/qualcomm/ipq806x/spi.c
+++ b/src/soc/qualcomm/ipq806x/spi.c
@@ -518,49 +518,6 @@ static struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
return NULL;
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- struct ipq_spi_slave *ds = NULL;
- int i;
-
- /*
- * IPQ GSBI (Generic Serial Bus Interface) supports SPI Flash
- * on different GSBI5, GSBI6 and GSBI7
- * with different number of chip selects (CS, channels):
- */
- if ((bus < GSBI5_SPI) || (bus > GSBI7_SPI)
- || ((bus == GSBI5_SPI) && (cs > 3))
- || ((bus == GSBI6_SPI) && (cs > 0))
- || ((bus == GSBI7_SPI) && (cs > 0))) {
- printk(BIOS_ERR, "SPI error: unsupported bus %d "
- "(Supported busses 0,1 and 2) or chipselect\n", bus);
- }
-
- for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
- if (spi_slave_pool[i].allocated)
- continue;
- ds = spi_slave_pool + i;
-
- ds->slave.bus = slave->bus = bus;
- ds->slave.cs = slave->cs = cs;
- ds->regs = &spi_reg[bus];
-
- /*
- * TODO(vbendeb):
- * hardcoded frequency and mode - we might need to find a way
- * to configure this
- */
- ds->freq = 10000000;
- ds->mode = GSBI_SPI_MODE_0;
- ds->allocated = 1;
-
- return 0;
- }
-
- printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
- return -1;
-}
-
/*
* GSBIn SPI Hardware Initialisation
*/
@@ -638,7 +595,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds)
return SUCCESS;
}
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct ipq_spi_slave *ds = to_ipq_spi(slave);
unsigned int ret;
@@ -661,7 +618,7 @@ int spi_claim_bus(const struct spi_slave *slave)
return SUCCESS;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct ipq_spi_slave *ds = to_ipq_spi(slave);
@@ -731,8 +688,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(MAX_PACKET_COUNT, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t out_bytes, void *din, size_t in_bytes)
{
int ret;
struct ipq_spi_slave *ds = to_ipq_spi(slave);
@@ -799,3 +756,53 @@ out:
return ret;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ struct ipq_spi_slave *ds = NULL;
+ int i;
+
+ /*
+ * IPQ GSBI (Generic Serial Bus Interface) supports SPI Flash
+ * on different GSBI5, GSBI6 and GSBI7
+ * with different number of chip selects (CS, channels):
+ */
+ if ((bus < GSBI5_SPI) || (bus > GSBI7_SPI)
+ || ((bus == GSBI5_SPI) && (cs > 3))
+ || ((bus == GSBI6_SPI) && (cs > 0))
+ || ((bus == GSBI7_SPI) && (cs > 0))) {
+ printk(BIOS_ERR, "SPI error: unsupported bus %d "
+ "(Supported busses 0,1 and 2) or chipselect\n", bus);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
+ if (spi_slave_pool[i].allocated)
+ continue;
+ ds = spi_slave_pool + i;
+
+ ds->slave.bus = slave->bus = bus;
+ ds->slave.cs = slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ ds->regs = &spi_reg[bus];
+
+ /*
+ * TODO(vbendeb):
+ * hardcoded frequency and mode - we might need to find a way
+ * to configure this
+ */
+ ds->freq = 10000000;
+ ds->mode = GSBI_SPI_MODE_0;
+ ds->allocated = 1;
+
+ return 0;
+ }
+
+ printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
+ return -1;
+}
diff --git a/src/soc/rockchip/common/spi.c b/src/soc/rockchip/common/spi.c
index 85597f2b79..16143b5ac8 100644
--- a/src/soc/rockchip/common/spi.c
+++ b/src/soc/rockchip/common/spi.c
@@ -67,16 +67,6 @@ static struct rockchip_spi_slave *to_rockchip_spi(const struct spi_slave *slave)
return &rockchip_spi_slaves[slave->bus];
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- assert(bus < ARRAY_SIZE(rockchip_spi_slaves));
-
- slave->bus = bus;
- slave->cs = cs;
-
- return 0;
-}
-
static void spi_cs_activate(const struct spi_slave *slave)
{
struct rockchip_spi *regs = to_rockchip_spi(slave)->regs;
@@ -155,13 +145,13 @@ void rockchip_spi_set_sample_delay(unsigned int bus, unsigned int delay_ns)
rsd << SPI_RXDSD_OFFSET);
}
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
spi_cs_activate(slave);
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
spi_cs_deactivate(slave);
}
@@ -266,8 +256,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(65535, buf_len);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytes_out, void *din, size_t bytes_in)
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytes_out, void *din, size_t bytes_in)
{
struct rockchip_spi *regs = to_rockchip_spi(slave)->regs;
int ret = 0;
@@ -337,3 +327,20 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
rockchip_spi_enable_chip(regs, 0);
return ret < 0 ? ret : 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ assert(bus < ARRAY_SIZE(rockchip_spi_slaves));
+
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+
+ return 0;
+}
diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c
index 5dbe024f71..f17566e2c5 100644
--- a/src/soc/samsung/exynos5420/spi.c
+++ b/src/soc/samsung/exynos5420/spi.c
@@ -117,23 +117,7 @@ static void exynos_spi_init(struct exynos_spi *regs)
spi_sw_reset(regs, 1);
}
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- ASSERT(bus >= 0 && bus < 3);
- struct exynos_spi_slave *eslave;
-
- slave->bus = bus;
- slave->cs = cs;
-
- eslave = to_exynos_spi(slave);
- if (!eslave->initialized) {
- exynos_spi_init(eslave->regs);
- eslave->initialized = 1;
- }
- return 0;
-}
-
-int spi_claim_bus(const struct spi_slave *slave)
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
// TODO(hungte) Add some delay if too many transactions happen at once.
@@ -193,7 +177,7 @@ static void spi_transfer(struct exynos_spi *regs, void *in, const void *out,
}
}
-int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
void *din, size_t bytes_in)
{
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
@@ -218,12 +202,35 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
return 0;
}
-void spi_release_bus(const struct spi_slave *slave)
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);
}
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ ASSERT(bus >= 0 && bus < 3);
+ struct exynos_spi_slave *eslave;
+
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+
+ eslave = to_exynos_spi(slave);
+ if (!eslave->initialized) {
+ exynos_spi_init(eslave->regs);
+ eslave->initialized = 1;
+ }
+ return 0;
+}
+
static int exynos_spi_read(struct spi_slave *slave, void *dest, uint32_t len,
uint32_t off)
{
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-09 22:17:11 +0000