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-rw-r--r--src/soc/imgtec/pistachio/monotonic_timer.c1
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c1
-rw-r--r--src/soc/nvidia/tegra210/bootblock.c1
-rw-r--r--src/soc/nvidia/tegra210/romstage.c1
-rw-r--r--src/soc/qualcomm/ipq40xx/blobs_init.c1
-rw-r--r--src/soc/qualcomm/sdm845/clock.c1
-rw-r--r--src/soc/qualcomm/sdm845/gpio.c1
-rw-r--r--src/soc/qualcomm/sdm845/soc.c1
-rw-r--r--src/soc/rockchip/rk3288/bootblock.c1
9 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/imgtec/pistachio/monotonic_timer.c b/src/soc/imgtec/pistachio/monotonic_timer.c
index f351ea1e30..6e40a39148 100644
--- a/src/soc/imgtec/pistachio/monotonic_timer.c
+++ b/src/soc/imgtec/pistachio/monotonic_timer.c
@@ -18,7 +18,6 @@
#include <soc/cpu.h>
#include <stdint.h>
#include <timer.h>
-#include <timestamp.h>
#define PISTACHIO_CLOCK_SWITCH 0xB8144200
#define MIPS_EXTERN_PLL_BYPASS_MASK 0x00000002
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index cf4bffccd6..e147f0c0aa 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -37,7 +37,6 @@
#include <stage_cache.h>
#include <stddef.h>
#include <stdint.h>
-#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* SOC initialization before RAM is enabled */
diff --git a/src/soc/nvidia/tegra210/bootblock.c b/src/soc/nvidia/tegra210/bootblock.c
index c10920db04..97ea1c9b08 100644
--- a/src/soc/nvidia/tegra210/bootblock.c
+++ b/src/soc/nvidia/tegra210/bootblock.c
@@ -26,7 +26,6 @@
#include <soc/nvidia/tegra/apbmisc.h>
#include <soc/pmc.h>
#include <soc/power.h>
-#include <timestamp.h>
#define BCT_OFFSET_IN_BIT 0x4c
#define ODMDATA_OFFSET_IN_BCT 0x508
diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c
index bce8404707..213d69d6ba 100644
--- a/src/soc/nvidia/tegra210/romstage.c
+++ b/src/soc/nvidia/tegra210/romstage.c
@@ -29,7 +29,6 @@
#include <soc/nvidia/tegra/apbmisc.h>
#include <symbols.h>
#include <timer.h>
-#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
void __weak romstage_mainboard_init(void)
diff --git a/src/soc/qualcomm/ipq40xx/blobs_init.c b/src/soc/qualcomm/ipq40xx/blobs_init.c
index d9cb131c8d..761b5714ed 100644
--- a/src/soc/qualcomm/ipq40xx/blobs_init.c
+++ b/src/soc/qualcomm/ipq40xx/blobs_init.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <string.h>
#include <timer.h>
-#include <timestamp.h>
#include <program_loading.h>
#include <soc/iomap.h>
diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c
index c4e5efa64f..bdbcfb827e 100644
--- a/src/soc/qualcomm/sdm845/clock.c
+++ b/src/soc/qualcomm/sdm845/clock.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include <delay.h>
#include <timer.h>
-#include <timestamp.h>
#include <commonlib/helpers.h>
#include <assert.h>
diff --git a/src/soc/qualcomm/sdm845/gpio.c b/src/soc/qualcomm/sdm845/gpio.c
index 9c3782a09e..a2a6fb9959 100644
--- a/src/soc/qualcomm/sdm845/gpio.c
+++ b/src/soc/qualcomm/sdm845/gpio.c
@@ -17,7 +17,6 @@
#include <types.h>
#include <delay.h>
#include <timer.h>
-#include <timestamp.h>
#include <gpio.h>
diff --git a/src/soc/qualcomm/sdm845/soc.c b/src/soc/qualcomm/sdm845/soc.c
index e4eac96276..bc7235f3ed 100644
--- a/src/soc/qualcomm/sdm845/soc.c
+++ b/src/soc/qualcomm/sdm845/soc.c
@@ -15,7 +15,6 @@
#include <symbols.h>
#include <device/device.h>
-#include <timestamp.h>
#include <soc/mmu.h>
#include <soc/symbols.h>
diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c
index 941d8a7650..8988804931 100644
--- a/src/soc/rockchip/rk3288/bootblock.c
+++ b/src/soc/rockchip/rk3288/bootblock.c
@@ -20,7 +20,6 @@
#include <soc/grf.h>
#include <soc/timer.h>
#include <symbols.h>
-#include <timestamp.h>
void bootblock_soc_init(void)
{