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-rw-r--r--src/soc/intel/fsp_broadwell_de/romstage/romstage.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 1f71c98283..5c9682ac9e 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -104,6 +104,10 @@ static void enable_integrated_uart(uint8_t port)
void *asmlinkage main(FSP_INFO_HEADER *fsp_info_header)
{
post_code(0x40);
+
+ timestamp_init(get_initial_timestamp());
+ timestamp_add_now(TS_START_ROMSTAGE);
+
if (!CONFIG(INTEGRATED_UART)) {
/* Enable decoding of I/O locations for Super I/O devices */
pci_write_config16(PCI_DEV(0x0, LPC_DEV, LPC_FUNC),
@@ -123,6 +127,8 @@ void *asmlinkage main(FSP_INFO_HEADER *fsp_info_header)
init_rtc();
setup_gpio_io_address();
+ timestamp_add_now(TS_BEFORE_INITRAM);
+
/*
* Call early init to initialize memory and chipset. This function returns
* to the romstage_main_continue function with a pointer to the HOB
@@ -144,7 +150,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
void *cbmem_hob_ptr;
post_code(0x4a);
- timestamp_init(get_initial_timestamp());
timestamp_add_now(TS_AFTER_INITRAM);
printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n",
__func__, (u32) status, (u32) hob_list_ptr);