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-rw-r--r--src/soc/intel/apollolake/include/soc/pci_devs.h4
-rw-r--r--src/soc/intel/apollolake/romstage.c13
2 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h
index 6aa2520b55..25b74babc0 100644
--- a/src/soc/intel/apollolake/include/soc/pci_devs.h
+++ b/src/soc/intel/apollolake/include/soc/pci_devs.h
@@ -48,6 +48,10 @@
/* PCH Devices */
+#define PCH_DEV_SLOT_NPK 0x00
+#define PCH_DEVFN_NPK _PCH_DEVFN(NPK, 2)
+#define PCH_DEV_NPK _PCH_DEV(NPK,2)
+
#define PCH_DEV_SLOT_P2SB 0x0d
#define PCH_DEVFN_P2SB _PCH_DEVFN(P2SB, 0)
#define PCH_DEVFN_PMC _PCH_DEVFN(P2SB, 1)
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 3d695ea52f..6a2007e937 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -319,6 +319,17 @@ static void soc_memory_init_params(FSPM_UPD *mupd)
#endif
}
+static void parse_devicetree_setting(FSPM_UPD *m_upd)
+{
+#if IS_ENABLED(CONFIG_SOC_INTEL_GLK)
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCH_DEVFN_NPK);
+ if (!dev)
+ return;
+
+ m_upd->FspmConfig.TraceHubEn = dev->enabled;
+#endif
+}
+
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
{
struct region_device rdev;
@@ -332,6 +343,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mainboard_memory_init_params(mupd);
+ parse_devicetree_setting(mupd);
+
/* Do NOT let FSP do any GPIO pad configuration */
mupd->FspmConfig.PreMemGpioTablePtr = (uintptr_t) NULL;