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-rw-r--r--src/soc/amd/stoneyridge/sb_util.c6
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c
index 8862b1710b..e394432d4a 100644
--- a/src/soc/amd/stoneyridge/sb_util.c
+++ b/src/soc/amd/stoneyridge/sb_util.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <arch/acpi.h>
#include <soc/southbridge.h>
void pm_write8(u8 reg, u8 value)
@@ -114,3 +115,8 @@ uint32_t xhci_pm_read32(uint8_t reg)
{
return read32((void *)(XHCI_ACPI_PM_MMIO_BASE + reg));
}
+
+int acpi_get_sleep_type(void)
+{
+ return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk()));
+}
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 1357257ea9..2dd0251503 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/io.h>
-#include <arch/acpi.h>
#include <bootstate.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
@@ -483,11 +482,6 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
return nvram_pos;
}
-int acpi_get_sleep_type(void)
-{
- return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk()));
-}
-
void sb_enable(device_t dev)
{
printk(BIOS_DEBUG, "%s\n", __func__);