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-rw-r--r--src/soc/intel/xeon_sp/chip_gen1.c6
-rw-r--r--src/soc/intel/xeon_sp/spr/ioat.c9
2 files changed, 12 insertions, 3 deletions
diff --git a/src/soc/intel/xeon_sp/chip_gen1.c b/src/soc/intel/xeon_sp/chip_gen1.c
index e419cc0397..0a489bc35b 100644
--- a/src/soc/intel/xeon_sp/chip_gen1.c
+++ b/src/soc/intel/xeon_sp/chip_gen1.c
@@ -28,6 +28,7 @@ static const STACK_RES *domain_to_stack_res(const struct device *dev)
static void iio_pci_domain_read_resources(struct device *dev)
{
const STACK_RES *sr = domain_to_stack_res(dev);
+ struct device *vtd_dev;
if (!sr)
return;
@@ -56,7 +57,10 @@ static void iio_pci_domain_read_resources(struct device *dev)
sr->PciResourceMem64Base, sr->PciResourceMem64Limit + 1);
/* Declare domain reserved MMIO */
- uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(pcidev_on_root(0, 0));
+ vtd_dev = pcidev_on_root(VTD_DEV_NUM, VTD_FUNC_NUM);
+ assert(vtd_dev);
+
+ uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(vtd_dev);
if ((reserved_mmio >= sr->PciResourceMem32Base) &&
(reserved_mmio <= sr->PciResourceMem32Limit))
mmio_range(dev, index++, reserved_mmio,
diff --git a/src/soc/intel/xeon_sp/spr/ioat.c b/src/soc/intel/xeon_sp/spr/ioat.c
index fcc3a20e2d..205d915832 100644
--- a/src/soc/intel/xeon_sp/spr/ioat.c
+++ b/src/soc/intel/xeon_sp/spr/ioat.c
@@ -10,8 +10,8 @@
#include <intelblocks/acpi.h>
#include <intelblocks/vtd.h>
#include <soc/acpi.h>
+#include <soc/pci_devs.h>
#include <IioPcieConfigUpd.h>
-
#include <soc/chip_common.h>
/*
@@ -79,6 +79,8 @@ void create_ioat_domains(const union xeon_domain_path path,
const STACK_RES *const sr,
const size_t pci_segment_group)
{
+ struct device *vtd_dev;
+
if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) {
printk(BIOS_WARNING,
"Ignoring IOAT domain with limited bus range.\n");
@@ -143,7 +145,10 @@ void create_ioat_domains(const union xeon_domain_path path,
&index);
/* Declare domain reserved MMIO */
- uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(pcidev_on_root(0, 0));
+ vtd_dev = pcidev_on_root(VTD_DEV_NUM, VTD_FUNC_NUM);
+ assert(vtd_dev);
+
+ uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(vtd_dev);
if ((reserved_mmio >= sr->PciResourceMem32Base) &&
(reserved_mmio <= sr->PciResourceMem32Limit))
mmio_range(dev, index, reserved_mmio,