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-rw-r--r--src/soc/imgtec/pistachio/include/soc/memlayout.ld2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
index 1c7ea9a74c..c3c6c07ebf 100644
--- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld
+++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
@@ -36,4 +36,6 @@ SECTIONS
/* Let's use SRAM for CBFS cache. */
CBFS_CACHE(0x9b000000, 64K)
+ /* DMA coherent area: end of available DRAM, uncached */
+ DMA_COHERENT(0xAFF00000, 1M)
}